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MBM29LV400TC-55PBT PDF预览

MBM29LV400TC-55PBT

更新时间: 2024-11-06 05:22:27
品牌 Logo 应用领域
飞索 - SPANSION 存储内存集成电路
页数 文件大小 规格书
58页 610K
描述
FLASH MEMORY CMOS 4M (512K X 8/256K X 16) BIT

MBM29LV400TC-55PBT 数据手册

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FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS05-20862-8E  
FLASH MEMORY  
CMOS  
4M (512K × 8/256K × 16) BIT  
MBM29LV400TC/BC-55/70/90  
FEATURES  
• Single 3.0 V read, program, and erase  
Minimizes system level power requirements  
• Compatible with JEDEC-standard commands  
Uses same software commands as E2PROMs  
• Compatible with JEDEC-standard world-wide pinouts  
48-pin TSOP(1) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)  
44-pin SOP (Package suffix: PF)  
48-pin CSOP (Package suffix: PCV)  
48-ball FBGA (Package suffix: PBT)  
48-ball SCSP (Package suffix: PW)  
• Minimum 100,000 program/erase cycles  
• High performance  
55 ns maximum access time  
• Sector erase architecture  
One 8K word, two 4K words, one 16K word, and seven 32K words sectors in word mode  
One 16K byte, two 8K bytes, one 32K byte, and seven 64K bytes sectors in byte mode  
Any combination of sectors can be concurrently erased. Also supports full chip erase  
• Boot Code Sector Architecture  
T = Top sector  
B = Bottom sector  
(Continued)  
PRODUCT LINE UP  
MBM29LV400 TC/BC  
Part No.  
-55  
-70  
-90  
+0.3 V  
–0.3 V  
+0.6 V  
–0.3 V  
Power Supply Voltage (V)  
VCC = 3.3 V  
VCC = 3.0 V  
Max Address Access Time (ns)  
Max CE Access Time (ns)  
Max OE Access Time (ns)  
55  
55  
30  
70  
70  
30  
90  
90  
35  

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