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MB84VD2009-10 PDF预览

MB84VD2009-10

更新时间: 2024-11-06 22:06:07
品牌 Logo 应用领域
富士通 - FUJITSU 存储
页数 文件大小 规格书
30页 372K
描述
8M (x 16) FLASH MEMORY & 2M (x 16) STATIC RAM

MB84VD2009-10 技术参数

是否Rohs认证: 不符合生命周期:Contact Manufacturer
包装说明:LBGA, BGA48,6X8,40Reach Compliance Code:compliant
HTS代码:8542.32.00.71风险等级:5.77
最长访问时间:100 ns其他特性:SRAM IS ORGANISED AS 128K X 16
JESD-30 代码:R-PBGA-B48JESD-609代码:e0
长度:11 mm内存密度:8388608 bit
内存集成电路类型:MEMORY CIRCUIT内存宽度:16
混合内存类型:FLASH+SRAM功能数量:1
端子数量:48字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-20 °C
组织:512KX16封装主体材料:PLASTIC/EPOXY
封装代码:LBGA封装等效代码:BGA48,6X8,40
封装形状:RECTANGULAR封装形式:GRID ARRAY, LOW PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3/3.3 V
认证状态:Not Qualified座面最大高度:1.6 mm
最大待机电流:0.00005 A子类别:Other Memory ICs
最大压摆率:0.06 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子面层:Tin/Lead (Sn/Pb)端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10 mm
Base Number Matches:1

MB84VD2009-10 数据手册

 浏览型号MB84VD2009-10的Datasheet PDF文件第2页浏览型号MB84VD2009-10的Datasheet PDF文件第3页浏览型号MB84VD2009-10的Datasheet PDF文件第4页浏览型号MB84VD2009-10的Datasheet PDF文件第5页浏览型号MB84VD2009-10的Datasheet PDF文件第6页浏览型号MB84VD2009-10的Datasheet PDF文件第7页 
FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS05-50111-1E  
MCP (Multi-Chip Package) FLASH MEMORY & SRAM  
CMOS  
8M (× 16) FLASH MEMORY &  
2M (× 16) STATIC RAM  
MB84VD2008-10/MB84VD2009-10  
FEATURES  
• Power supply voltage of 2.7 to 3.6 V  
• High performance  
100 ns maximum access time  
• Operating Temperature  
–20 to +85°C  
— FLASH MEMORY  
• Simultaneous operations Read-while Erase or Read-while-Program  
• Minimum 100,000 write/erase cycles  
• Sector erase architecture  
Two 16 K byte, four 8 K bytes, two 32 K byte, and fourteen 64 K bytes.  
Any combination of sectors can be concurrently erased. Also supports full chip erase.  
• Boot Code Sector Architecture  
MB84VD2008: Top sector  
MB84VD2009: Bottom sector  
• Embedded EraseTM Algorithms  
Automatically pre-programs and erases the chip or any sector  
• Embedded ProgramTM Algorithms  
Automatically writes and verifies data at specified address  
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion  
• Ready-Busy output (RY/BY)  
Hardware method for detection of program or erase cycle completion  
• Automatic sleep mode  
When addresses remain stable, automatically switch themselves to low power mode.  
• Low VCC write inhibit 2.5 V  
• Erase Suspend/Resume  
Suspends the erase operation to allow a read in another sector within the same device  
• Please refer to "MBM29DL800TA/BA" data sheet in detailed function  
— SRAM  
• Power dissipation  
Operating: 50 mA max.  
Standby : 50 µA max.  
• Data retention supply voltage: 2.0 V to 3.6 V  
Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.  

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