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MAX5891

更新时间: 2023-12-20 18:46:13
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
16页 1615K
描述
16位、600Msps、高动态性能DAC,LVDS输入

MAX5891 数据手册

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EVALUATION KIT AVAILABLE  
MAX5891  
16-Bit, 600Msps, High-Dynamic-Performance  
DAC with LVDS Inputs  
General Description  
Features  
600Msps Output Update Rate  
The MAX5891 advanced 16-bit, 600Msps, digital-to-  
analog converter (DAC) meets the demanding perfor-  
mance requirements of signal synthesis applications  
found in wireless base stations and other communications  
applications. Operating from 3.3V and 1.8V supplies, the  
MAX5891 DAC supports update rates of 600Msps using  
high-speed LVDS inputs while consuming only 298mW  
of power and offers exceptional dynamic performance  
such as 80dBc spurious-free dynamic range (SFDR) at  
Low Noise Spectral Density: -163dBFS/Hz at  
f
= 36MHz  
OUT  
Excellent SFDR and IMD Performance  
• SFDR = 80dBc at f  
• SFDR = 71dBc at f  
• IMD = -95dBc at f  
• IMD = -70dBc at f  
= 30MHz (to Nyquist)  
= 130MHz (to Nyquist)  
= 30MHz  
OUT  
OUT  
OUT  
OUT  
= 130MHz  
ACLR = 73dB at f  
= 122.88MHz  
f
= 30MHz.  
OUT  
OUT  
2mA to 20mA Full-Scale Output Current  
LVDS-Compatible Digital Inputs  
The MAX5891 utilizes a current-steering architecture that  
supports a 2mA to 20mA full-scale output current range,  
and produces -2dBm to -22dBm full-scale output signal  
levels with a double-terminated 50Ω load. The MAX5891  
features an integrated 1.2V bandgap reference and  
control amplifier to ensure high-accuracy and low-noise  
performance. A separate reference input (REFIO) allows  
for the use of an external reference source for optimum  
flexibility and improved gain accuracy.  
On-Chip 1.2V Bandgap Reference  
Low 298mW Power Dissipation at 600Msps  
Compact (10mm x 10mm) QFN-EP Package  
Evaluation Kit Available (MAX5891EVKIT)  
Ordering Information  
The MAX5891 digital inputs accept LVDS voltage levels,  
and the flexible clock input can be driven differentially or  
single-ended, AC- or DC-coupled. The MAX5891 is avail-  
able in a 68-pin QFN package with an exposed paddle  
(EP) and is specified for the extended (-40°C to +85°C)  
temperature range.  
PKG  
CODE  
PART  
TEMP RANGE PIN-PACKAGE  
MAX5891EGK-D -40°C to +85°C 68 QFN-EP*  
MAX5891EGK+D -40°C to +85°C 68 QFN-EP*  
G6800-4  
G6800-4  
*EP = Exposed paddle.  
+ = Lead-free package.  
D = Dry pack.  
Refer to the MAX5890 and MAX5889 data sheets for pin-  
compatible 14-bit and 12-bit versions of the MAX5891.  
Applications  
Base Stations: Single/Multicarrier UMTS,  
Functional Diagram  
CDMA, GSM  
Communications: Fixed Broadband Wireless  
Access, Point-to-Point Microwave  
Direct Digital Synthesis (DDS)  
Cable Modem Termination Systems (CMTS)  
Automated Test Equipment (ATE)  
Instrumentation  
MAX5891  
OUTP  
D0–D15  
LVDS DATA  
INPUTS  
600MHz  
16-BIT DAC  
LVDS  
RECEIVER  
LATCH  
OUTN  
Selector Guide  
DACREF  
REFIO  
RESOLUTION UPDATE RATE  
1.2V  
REFERENCE  
PART  
LOGIC INPUT  
(BITS)  
(Msps)  
FSADJ  
CLKP  
CLKN  
CLK  
INTERFACE  
MAX5889  
MAX5890  
MAX5891  
12  
600  
LVDS  
LVDS  
LVDS  
14  
600  
POWER  
DOWN  
PD  
16  
600  
Pin Configuration appears at end of data sheet.  
19-3542; Rev 4; 2/07  

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