19-3223; Rev 0; 2/04
Ultra-Low-Power, High-Dynamic-
Performance, 60Msps Analog Front End
General Description
Features
♦ Integrated Dual, 8-Bit ADCs and Dual, 10-Bit DACs
♦ Ultra-Low Power
The MAX5866 ultra-low-power, highly integrated analog
front end is ideal for portable communication equipment
such as handsets, PDAs, WLAN, and 3G wireless termi-
nals. The MAX5866 integrates dual, 8-bit receive ADCs
and dual, 10-bit transmit DACs while providing the high-
est dynamic performance at ultra-low power. The ADCs’
analog I-Q input amplifiers are fully differential and
80mW at f
= 60MHz (R Mode)
x
CLK
52.5mW at f
= 60MHz (T Mode)
CLK
x
Low-Current Idle and Shutdown Modes
♦ Excellent Dynamic Performance
accept 1V
full-scale signals. Typical I-Q channel
P-P
48dB SINAD at f = 25MHz (ADC)
IN
phase matching is 0.ꢀ2 and amplitude matching is
0.05dꢁ. The ADCs feature ꢂ8dꢁ ꢃINAD and ꢄ0.1dꢁc
64.2dBc SFDR at f
= 6MHz (DAC)
OUT
spurious-free dynamic range (ꢃFDR) at f = ꢀ5MHz and
IN
♦ Excellent Gain/Phase Match
f
= 60MHz. The DACs’ analog I-Q outputs are fully
CLK
±0.2° Phase, ±0.05dB Gain at f = 25MHz (ADC)
IN
differential with ±ꢂ00mV full-scale output, and 1.ꢂV com-
mon-mode level. Typical I-Q channel phase matching is
0.ꢂ2 and gain matching is 0.1dꢁ. The DACs also fea-
♦ Internal/External Reference Option
♦ +2.7V to +3.3V Digital Output Level (TTL/CMOS
ture dual, 10-bit resolution with 6ꢂ.ꢀdꢁc ꢃFDR, at f
=
OUT
Compatible)
6MHz and f
= 60MHz.
CLK
♦ Multiplexed Parallel Digital Input/Output for
The ADCs and DACs operate simultaneously or indepen-
dently for frequency-division duplex (FDD) and time-divi-
sion duplex (TDD) modes. A 3-wire serial interface
controls power-down and transceiver modes of opera-
ADCs/DACs
♦ Miniature 48-Pin Thin QFN Package (7mm ♦ 7mm)
♦ Evaluation Kit Available (Order MAX5865EVKIT)
tion. The typical operating power is 96mW at f
=
CLK
60MHz with the ADCs and DACs operating simultane-
ously in transceiver mode. The MAX5866 features an
internal 1.0ꢀꢂV voltage reference that is stable over the
entire operating power-supply range and temperature
range. The MAX5866 operates on a +ꢀ.ꢄV to +3.3V ana-
log power supply and a +ꢀ.ꢄV to +3.3V digital I/O power
supply for logic compatibility. The quiescent current is
1ꢀmA in idle mode and 1µA in shutdown mode. The
MAX5866 is specified for the extended (-ꢂ02C to +852C)
temperature range and is available in a ꢂ8-pin thin QFN
package.
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
ꢂ8 Thin QFN-EP*
(ꢄmm x ꢄmm)
MAX5866ETM
-ꢂ0°C to +85°C
*EP = Exposed paddle.
Functional Diagram
MAX5866
Applications
Narrowband/Wideband CDMA Handsets
and PDAs
IA+
ADC
ADC
OUTPUT
MUX
IA-
QA+
QA-
DA0–DA7
CLK
ADC
Fixed/Mobile ꢁroadband Wireless Modems
3G Wireless Terminals
ID+
ID-
DAC
DAC
DAC
INPUT
MUX
VꢃAT Modems
DD0–DD9
QD+
QD-
REFP
COM
REFN
SERIAL
INTERFACE
AND SYSTEM
CONTROL
DIN
SCLK
CS
REF
AND
BIAS
REFIN
Pin Configuration appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.