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MAX5858A

更新时间: 2024-11-06 22:55:19
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美信 - MAXIM /
页数 文件大小 规格书
25页 907K
描述
Dual, 10-Bit, 300Msps, DAC with 4x/2x/1x Interpolation Filters and PLL

MAX5858A 数据手册

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19-2999; Rev 0; 10/03  
Dual, 10-Bit, 300Msps, DAC with 4x/2x/1x  
Interpolation Filters and PLL  
General Description  
Features  
The MAX5858A dual, 10-bit, 300Msps digital-to-analog  
converter (DAC) provides superior dynamic performance  
in wideband communication systems. The MAX5858A  
integrates two 10-bit DAC cores, 4x/2x/1x programmable  
digital interpolation filters, phase-lock loop (PLL) clock  
multiplier, and a 1.24V reference. The MAX5858A sup-  
ports single-ended and differential modes of operation.  
The MAX5858A dynamic performance is maintained over  
the entire power-supply operating range of 2.7V to 3.3V.  
The analog outputs support a compliance voltage of  
-1.0V to +1.25V.  
o 10-Bit Resolution, Dual DAC  
o 300Msps Update Rate  
o Integrated 4x/2x/1x Interpolating Filters  
o Internal PLL Multiplier  
o 2.7V to 3.3V Single Supply  
o Full Output Swing and Dynamic Performance at  
2.7V Supply  
o Superior Dynamic Performance  
73dBc SFDR at f  
= 20MHz  
OUT  
UMTS ACLR = 63dB at f  
= 30.7MHz  
OUT  
The 4x/2x/1x programmable interpolation filters feature  
excellent passband distortion and noise performance.  
Interpolating filters minimize the design complexity of  
analog reconstruction filters while lowering the data bus  
and the clock speeds of the digital interface. The PLL  
multiplier generates all internal, synchronized high-  
speed clock signals for interpolating filter operation and  
DAC core conversion. The internal PLL helps minimize  
system complexity and lower cost. To reduce the I/O pin  
count, the DAC can also operate in interleave data  
mode. This allows the MAX5858A to be updated on a  
single 10-bit bus.  
o Programmable Channel Gain Matching  
o Integrated 1.24V Low-Noise Bandgap Reference  
o Single-Resistor Gain Control  
o Interleave Data Mode  
o Differential Clock Input Modes  
o EV Kit Available—MAX5858AEVKit  
Ordering Information  
PART  
TEMP RANGE  
PIN-PACKAGE  
The MAX5858A features digital control of channel gain  
matching to within 0.4dꢀ in sixteen 0.05dꢀ steps.  
Channel matching improves sideband suppression in  
analog quadrature modulation applications. The on-  
chip 1.24V bandgap reference includes a control  
amplifier that allows external full-scale adjustments of  
both channels through a single resistor. The internal ref-  
erence can be disabled and an external reference can  
be applied for high-accuracy applications.  
MAX5858AECM  
*EP = Exposed paddle.  
-40°C to +85°C  
48 TQFP-EP*  
Pin Configuration  
48 47 46 45 44 43 42 41 40 39 38 37  
The MAX5858A features full-scale current outputs of  
2mA to 20mA and operates from a 2.7V to 3.3V single  
supply. The DAC supports three modes of power-con-  
trol operation: normal, low-power standby, and com-  
plete power-down. In power-down mode, the operating  
current is reduced to 1µA.  
1
2
3
4
5
6
7
8
9
36 REFO  
DA9/PD  
DA8/DACEN  
DA7/F2EN  
DA6/F1EN  
DA5/G3  
EP  
35  
34  
REN  
PLLF  
33 PGND  
32 PV  
DD  
31  
CLKXN  
30 CLKXP  
29 PLLEN  
28 LOCK  
27  
CW  
26 DB0  
25 DB1  
DGND  
The MAX5858A is packaged in a 48-pin TQFP with  
exposed paddle (EP) for enhanced thermal dissipation  
and is specified for the extended (-40°C to +85°C) opera-  
ting temperature range.  
MAX5858A  
DV  
DD  
DA4/G2  
DA3/G1  
DA2/G0  
DA1  
10  
11  
12  
Applications  
DA0  
Communications  
SatCom, LMDS, MMDS, HFC, DSL, WLAN,  
Point-to-Point Microwave Links  
13 14 15 16 17 18 19 20 21 22 23 24  
Wireless ꢀase Stations  
Direct Digital Synthesis  
Instrumentation/ATE  
TQFP-EP  
NOTE: EXPOSED PADDLE CONNECTED TO GND.  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  

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