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MAX3627CTJ+ PDF预览

MAX3627CTJ+

更新时间: 2024-11-09 11:17:27
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美信 - MAXIM 晶体时钟发生器外围集成电路信息通信管理
页数 文件大小 规格书
11页 610K
描述
+3.3V, Low-Jitter, Precision Clock Generator with Multiple Outputs

MAX3627CTJ+ 数据手册

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19-4567; Rev 0; 4/09  
+3.3V, Low-Jitter, Precision Clock  
Generator with Multiple Outputs  
MAX3627  
General Description  
Features  
Crystal Oscillator Interface: 25MHz  
The MAX3627 is a low-jitter, precision clock generator  
optimized for network applications. The device inte-  
grates a crystal oscillator and a phase-locked loop  
(PLL) to generate high-frequency clock outputs for  
Ethernet applications.  
OSC_IN Interface  
PLL Enabled: 25MHz  
PLL Disabled: 20MHz to 320MHz  
Outputs  
Maxim’s proprietary PLL design features ultra-low jitter  
One LVDS Output at 125MHz/156.25MHz/  
312.5MHz (Selectable with FSELA)  
Six LVDS Outputs at 125MHz/156.25MHz/  
312.5MHz (Selectable with FSELB)  
One LVCMOS Output at 125MHz/156.25MHz  
(Selectable with FSELB)  
(0.4ps  
) and excellent power-supply noise rejection  
RMS  
(PSNR), minimizing design risk for network equipment.  
The MAX3627 contains seven LVDS outputs and one  
LVCMOS output. The output frequencies are selectable  
among 125MHz, 156.25MHz, and 312.5MHz.  
Low Phase Jitter  
0.4ps  
0.2ps  
(12kHz to 20MHz)  
(1.875MHz to 20MHz)  
RMS  
RMS  
Applications  
Ethernet Networking Equipment  
Excellent PSNR: -64dBc at 156.25MHz with  
40mV Supply Noise at 100kHz  
P-P  
Operating Temperature Range: 0°C to +70°C  
Typical Operating Circuit  
+3.3V 5%  
Ordering Information  
0.1μF  
0.1μF  
0.1μF  
PART  
TEMP RANGE  
PIN-PACKAGE  
10.5Ω  
MAX3627CTJ+  
0°C to +70°C  
32 TQFN-EP*  
125MHz/156MHz/312.5MHz  
V
DD  
V
V
DDO_SE  
DDO_DIFF  
10μF  
Q0  
Z
= 50Ω  
0
+Denotes a lead(Pb)-free/RoHS-compliant package.  
*EP = Exposed pad.  
V
DDA  
100Ω  
ASIC  
0.01μF  
Q0  
Q1  
Z
= 50Ω  
0
Pin Configuration  
125MHz/156MHz/312.5MHz  
Z
= 50Ω  
0
100Ω  
100Ω  
100Ω  
100Ω  
100Ω  
100Ω  
ASIC  
ASIC  
ASIC  
ASIC  
ASIC  
MAX3627  
TOP VIEW  
Q1  
Q2  
Z
= 50Ω  
OPEN  
OSC_IN  
OE  
0
125MHz/156MHz/312.5MHz  
OPEN  
Z
= 50Ω  
0
24 23 22 21 20 19 18 17  
16  
15  
V
DD  
25  
OE  
Q2  
Q3  
Z
= 50Ω  
0
125MHz/156MHz/312.5MHz  
FSELB  
PLL_BP 26  
V
Z
= 50Ω  
0
33pF  
14 Q4  
27  
28  
29  
30  
31  
32  
DDA  
X_OUT  
X_IN  
Q3  
Q4  
Z
= 50Ω  
0
FSELA  
Q4  
13  
12  
25MHz  
(C = 18pF)  
L
125MHz/156MHz/312.5MHz  
MAX3627  
OSC_IN  
X_IN  
V
DDO_DIFF  
Z
= 50Ω  
0
27pF  
11 Q3  
Q4  
Q5  
Z
= 50Ω  
0
*EP  
10  
9
Q3  
X_OUT  
GND  
+
V
DD  
125MHz/156MHz/312.5MHz  
PLL_BP  
FSELA  
Z
= 50Ω  
0
GND  
1
2
3
4
5
6
7
8
Q5  
Q6  
Z
= 50Ω  
0
GND, OPEN, OR V  
GND, OPEN, OR V  
DD  
125MHz/156MHz/312.5MHz  
Z
= 50Ω  
0
ASIC  
ASIC  
FSELB  
GND  
DD  
Q6  
Q7  
Z
= 50Ω  
0
THIN QFN  
(5mm × 5mm)  
125MHz/156.25MHz  
= 50Ω  
33Ω  
Z
0
*EXPOSED PAD CONNECTED TO GROUND.  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,  
or visit Maxim’s website at www.maxim-ic.com.  

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