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MAX32570-MNJ+ PDF预览

MAX32570-MNJ+

更新时间: 2024-11-10 02:51:03
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描述
Low-Power Arm Cortex-M4 Microcontroller with Contactless Radio for Secure Applications

MAX32570-MNJ+ 数据手册

 浏览型号MAX32570-MNJ+的Datasheet PDF文件第2页 
ABRIDGED DATA SHEET  
Click here to ask about the production status of specific part numbers.  
MAX32570  
Low-Power Arm Cortex-M4 Microcontroller  
with Contactless Radio for Secure Applications  
General Description  
Benefits and Features  
● High-Efficiency Microcontroller for Secure Battery  
Powered Applications  
®
The MAX32570 DeepCover secure microcontroller pro-  
vides an interoperable, secure, and cost-effective solution  
to build new generations of trusted devices. It can be used  
in single-chip applications such as pinpads, mobile POS  
(MPOS), and secure card reader for PIN (SCRP), but al-  
so in dual-chip applications such as countertop and tablet  
POS. It includes all the essential functions to address  
those applications including a multi-protocol RF contact-  
less controller and radio front-end, a dual smart card con-  
troller, a parallel camera inteface, a magnetic stripe read-  
er, a TFT controller, and a secure keypad controller.  
• Arm Cortex-M4 Processor with FPU up to 150MHz  
• 150MHz and 75MHz Internal Oscillators  
• Low-Power 7.37MHz System Clock Option  
• 1MB Flash, Organized into Dual Banks 2 x 512KB  
• 760KB (608KB ECC) SRAM  
• Optional Error Correction Code (ECC-SEC-DED)  
for Cache, SRAM, and Internal Flash  
• 1KB AES Encrypted NVSRAM, 16KB Internal OTP  
● Scalable Cached External Memory Interfaces  
• QSPI Flash with AES-GCM and XiP  
The MAX32570 operates at 150MHz and is based on an  
®
®
Arm Cortex -M4 with FPU processor with 1MB flash,  
760KB SRAM, 4KB OTP, 1KB of battery-backed AES self-  
encrypted nonvolatile SRAM (NVSRAM) and a 256-bit flip-  
flop based battery-backed key storage. The flash mem-  
ory is split into 2 banks of 512KB to provide flexibility  
when programming over-the-air. Error correction coding  
(ECC) (single error correction double error detection) for  
flash and SRAM provides extremely reliable code execu-  
tion. The device embeds both secure public and private  
key cryptographic algorithms and a true random number  
generator (TRNG) compliant with SP-800-90A and  
SP-800-90B standards. It also features a number of secu-  
rity protections and detectors to enforce system integrity  
including a dynamic sensor controller, environmental sen-  
sors, and fault detectors.  
• QSPI SRAM with AES-GCM and XiP  
• 150Mbps SDHC/eMMC/SDIO/microSD Interface  
● Security Features Facilitates System-Level Protection  
• ISO 14443A/B, JIS X 6319-4, ISO 15693  
Contactless Reader with Internal Transceiver  
• Secure Boot Loader with Public Key Authentication  
• Hardware AES, DES, ECDSA and SHA-2 engines  
• 10-Line Secure Keypad Controller*  
• TRNG (SP-800-90A and SP-800-90B)  
• 6 External Dynamic Tamper Sensors  
• Die Shield with Dynamic Random Signal  
• 1x 256-Bit and 2x 128-Bit Flip-Flop-Based AES Key  
Storage  
• Temperature and Voltage Tamper Monitor  
• Fault Detectors  
The device features five flexible power modes. Multiple  
● Optimal Peripheral Mix Provides Platform Scalability  
• 16-Channel DMA  
2
SPI, UART, and I C serial interfaces, as well as a QSPI,  
®
1-Wire master, a USB 2.0 High-Speed device, and an  
• One QSPI/SPI Master  
optional 10/100 Ethernet MAC, allow for greater connec-  
tivity. Some device package variants offer flexible off-chip  
memory expansion that supports SD/SDHC, SDIO/eMMC  
cards, QSPI flash, and SRAM memories with eXecute In  
Place (XIP), encryption, and authentication. The device is  
available in a number of package variants, ranging from  
BGA-81 to BGA-169, 0.65mm pitch packages.  
• Up to Three SPI Master (37.5MHz)/Slave (75MHz)  
• Up to Six 4MBd UARTs with Flow Control  
• Up to Two ISO 7816 UART/Smart Card Controller  
• Up to Three 1MHz I C Master/Slave  
• Up to Three Channels 7.8ksps 10-Bit Sigma-Delta  
ADC  
• USB 2.0 High-Speed Device Interface with PHY  
• 10/100 Ethernet MAC with RMII/MII Support  
• 24-Bit TFT LCD Controller  
2
Applications  
● Secure Card Reader for PIN (SCRP)  
● PCI Mobile Payment Terminals (MPOS)  
● Countertop and Tablet POS  
● Contact/Contactless Pinpads  
● ATM Keyboards  
• 12-Bit Parallel Camera Interface  
• Triple-Track Magnetic Stripe Head Interface  
• Eight Pulse Train Generators  
• Six 32-Bit Timers, Two HTimers  
• 1-Wire Master, Two Watchdog Timers  
• Real-Time Clock (RTC)  
Ordering Information appears at end of data sheet.  
Arm and Cortex are registered  
trademarks of Arm Limited (or its  
subsidiaries) in the US and/or  
elsewhere.  
DeepCover and 1-Wire are registered  
trademarks of Maxim Integrated  
Products, Inc.  
19-100602; Rev 2; 9/20  

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