Datasheet > 微控制器和处理器 > 串行 IO/通信控制器> MAS3693FL

MAS3693FL

更新时间： 2024-11-15 11:19:11

品牌	Logo	应用领域
DYNEX		总线控制器
页数	文件大小	规格书
41页	427K
描述
1553B Bus Controller/Remote Terminal

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

MAS3693FL 数据手册

MA3690/1/3

1553B Bus Controller/Remote Terminal

Replaces June 1999 version, DS3587-4.0

DS3587-5.0 January 2000

The MA3690/1 chip set has three modes of operation:

remote terminal, bus controller, and passive monitor It has a

dual bus capability, requires minimum support hardware /

software and is implemented on a radiation hard, CMOS/SOS

process. For applications requiring access to Terminal Flag, a

48-Pin DIL MA3693 is available as an alternative to the

MA3690.

As a remote terminal, the MA3690/1 is fully compatible with

Mil-Std-1553B. The chip set obtained SEAFAC approval in

December 1987. All options and mode commands specified by

the Mil Std are implemented Full and meaningful use is made

of status word bits and a comprehensive bit word is provided.

A unique mechanism has been incorporated that allows

the subsystem to declare illegal commands legal, and vice

versa, before the chip set services the command. It should be

noted that use of this mechanism is optional and that the

system defaults to normal operation if the option is not

required. The chip set is easily interfaced to subsystem

memory and is sufficiently flexible to ensure compatibility with

a wide range of microprocessors.

FEATURES

■ Radiation Hard to 1MRads (Si)

■ High SEU Immunity, Latch-Up Free

■ CMOS-SOS Technology

■ All Inputs and Outputs Fully TTL or CMOS Compatible

■ Military Temperature Range -55 to +125°C

■ Dual Bus Capability

■ Minimal Subsystem Interface

■ Powerful Bus Control Facility

■ Complete Remote Terminal Protocol

■ SEAFAC Approved

SIGNAL DESCRIPTIONS

All signals are TTL compatible unless stated otherwise. An

‘N’ at the end of the signal name denotes an active low signal.

As a bus controller the MA3690/1 has the ability to initiate

all types of 1553B transfer on either of the two buses An

instruction word is set up by the subsystem, prior to

transmission, which contains details of transfer type and bus

selection. Four bits of the instruction word have been used to

specify the conditions under which the chip set will generate a

subsystem interrupt. The most significant bits of the instruction

word have been used to specify the conditions under which the

chip set will perform an automatic retry and the number of

retries to be carried out (max. 3). At the end of each instruction

execution cycle, the chip set writes a report word into the

subsystem memory; the contents of which give the subsystem

an indication of the degree of success of the transfer.

The bus controller may be used in either of two

configurations, i.e. single shot or table driven.

SUPPLIES

VDD

VSS

5 volts positive supply

Ground

CLOCK INPUTS

CK12

12MHz clock

BUS INTERFACE LINES

In the single shot configuration, the controller is under

direct control from the subsystem (processor). In table driven

configuration, the controller is given greater autonomy to

execute a table of instructions held in either ROM or RAM.

As a passive monitor, the chip set will monitor all bus

activity and pass any associated information to the subsystem.

As the name implies, in this mode of operation, the chip set is

truly passive and will not reply to command instructions.

PDIN0

Input

Positive threshold exceeded on bus 0.

NDIN0

Input

Negative threshold exceeded on bus 0.

TXEN0N

Output

Transmit enable for driver on bus 0.

PDOUT0N

Output

Positive Manchester data for driver on bus 0.

1/41

12 3 4 5 6 7...41

中文翻译

下载PDF

与MAS3693FL相关器件

型号	品牌	获取价格	描述	数据表
MAS3693NB	DYNEX	获取价格	Mil-Std-1553 Controller, 2 Channel(s), 0.125MBps, CMOS, DIE
MAS3693NC	DYNEX	获取价格	1553B Bus Controller/Remote Terminal
MAS3693ND	DYNEX	获取价格	1553B Bus Controller/Remote Terminal
MAS3693NE	DYNEX	获取价格	1553B Bus Controller/Remote Terminal
MAS3693NL	DYNEX	获取价格	1553B Bus Controller/Remote Terminal
MAS3693NS	DYNEX	获取价格	Mil-Std-1553 Controller, 2 Channel(s), 0.125MBps, CMOS, DIE
MAS3764CCB	DYNEX	获取价格	MASK ROM, 8KX8, 55ns, CMOS, CDIP28
MAS3764CFB	DYNEX	获取价格	MASK ROM, 8KX8, 55ns, CMOS, CDFP28
MAS3764TCB	DYNEX	获取价格	MASK ROM, 8KX8, 55ns, CMOS, CDIP28
MAS3764TCS	DYNEX	获取价格	MASK ROM, 8KX8, 55ns, CMOS, CDIP28

与MAS3693FL相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

6
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

3
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

29
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

12

产品中心

服务支持

精选活动

关于我们

帮助中心

MAS3693FL

MAS3693FL 数据手册

与MAS3693FL相关器件

与MAS3693FL相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MAS3693FL

MAS3693FL 数据手册

与MAS3693FL相关器件

与MAS3693FL相关文章

您还可以找

您在本页遇到什么问题？