MACH215-12

更新时间： 2024-10-27 22:35:15

品牌	Logo	应用领域
莱迪思 - LATTICE		可编程逻辑
页数	文件大小	规格书
30页	243K
描述
High-Density EE CMOS Programmable Logic

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MACH215-12 数据手册

FINAL

COM’L: -12/15/20

IND: -14/18/24

Lattice Semiconductor

MACH215-12/15/20

High-Density EE CMOS Programmable Logic

DISTINCTIVE CHARACTERISTICS

■ 44 Pins

■ 38 Inputs with pull-up resistors

■ 32 Output Macrocells

■ 32 Input Macrocells

■ 32 Outputs

■ 64 Flip-flops

■ Product terms for:

■ For asynchronous and synchronous

— Individual flip-flop clock

applications

— Individual asynchronous reset, preset

— Individual output enable

■ 4 “PAL22RA8” blocks with buried macrocells

■ Pin-compatible with MACH110, MACH111,

■ 12 ns t_PDCommercial

MACH210, and MACH211

14.5 ns t_PDIndustrial

■ 67 MHz f_CNT

GENERAL DESCRIPTION

TheMACH215isamemberofthehigh-performance

EE CMOS MACH device family. This device has

approximately three times the capability of the popular

PAL20RA10 without loss of speed. This device is

designed for use in asynchronous as well as synchro-

nous applications.

The MACH215 has two kinds of macrocell: output and

input. The MACH215 output macrocell provides regis-

tered, latched, or combinatorial outputs with program-

mable polarity. If a registered configuration is chosen,

the register can be configured as D-type or T-type to

help reduce the number of product terms. The register

type decision can be made by the designer or by the

software. Each macrocell has its own dedicated clock,

asynchronous reset, and asynchronous preset control.

The polarity of the clock signal is programmable. All

output macrocells can be connected to an I/O cell.

The MACH215 consists of four PAL blocks intercon-

nected by a programmable switch matrix. The four PAL

blocks are essentially “PAL22RA8” structures complete

with product-term arrays and programmable macro-

cells, individual register control product terms, and input

registers. The switch matrix connects the PAL blocks to

each other and to all input pins, providing a high degree

of connectivity between the fully-connected PAL blocks.

This allows designs to be placed and routed efficiently.

The MACH215 has dedicated input macrocells which

provide input registers or latches for synchronizing input

signals and reducing setup time requirements.

Publication# 16751 Rev. E

Issue Date: May 1995

Amendment/0

12 3 4 5 6 7...30

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与MACH215-12相关器件

型号	品牌	获取价格	描述	数据表
MACH215-12JC	LATTICE	获取价格	High-Density EE CMOS Programmable Logic
MACH215-15JC	LATTICE	获取价格	High-Density EE CMOS Programmable Logic
MACH215-20JC	LATTICE	获取价格	High-Density EE CMOS Programmable Logic
MACH220-10	LATTICE	获取价格	High-Density EE CMOS Programmable Logic
MACH220-10	AMD	获取价格	High-Density EE CMOS Programmable Logic
MACH220-10JC	LATTICE	获取价格	High-Density EE CMOS Programmable Logic
MACH220-10JC	AMD	获取价格	High-Density EE CMOS Programmable Logic
MACH220-10JI	AMD	获取价格	High-Density EE CMOS Programmable Logic
MACH220-12	AMD	获取价格	High-Density EE CMOS Programmable Logic
MACH220-12JC	LATTICE	获取价格	High-Density EE CMOS Programmable Logic

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