Datasheet > MAAP-015036

MAAP-015036

更新时间： 2024-11-22 01:09:55

品牌	Logo	应用领域
泰科 - TE		/
页数	文件大小	规格书
13页	1473K
描述
Dual Sided Bias Architecture

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数据手册

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MAAP-015036 数据手册

MAAP-015036

Power Amplifier, 15 W

8.5 - 10.5 GHz

Rev. V1

Features

Functional Schematic



15 W Power Amplifier

42 dBm Saturated Pulsed Output Power

17 dB Large Signal Gain

P_SAT>40% Power Added Efficiency

Dual Sided Bias Architecture

On Chip Bias Circuit

100% On-Wafer DC, RF and Output Power

Testing



100% Visual Inspection to MIL-STD-883 Method

2010

Description

The MAAP-015036 is a two stage GaAs MMIC

power amplifier operating from 8.5 - 10.5 GHz, with

a saturated pulsed output power of 42 dBm and a

large signal gain of 18 dB.

Pin Configuration²

This power amplifier uses GaAs pHEMT device

technology and is based upon optical gate

lithography to ensure high repeatability and

uniformity. The chip has surface passivation for

protection and backside via holes and gold

metallisation to allow a conductive epoxy die attach

process.

V_G1

V_D2

GND

V_D1

V_SS1

V_{1_5}

This device is well suited for communications, Point

to Point radio and radar applications.

GND

V_G2

V_SS

GND

V_{2_5}

GND

V_G2

V_SS2

GND

V_{1_5}

Ordering Information

V_D1

GND

V_D2

V_SS1

MAAP-015036-DIE

Die in Gel Pack¹

GND

V_G1

Sample Board

Direct Gate Bias

MAAP-015036-DIEEV1

Sample Board

On-Chip Gate Bias

MAAP-015036-DIEEV2

RF_OUT

RF_IN

2. Backside metal is RF, DC and thermal ground.

1. Die quantity varies.

* Restrictions on Hazardous Substances, European Union Directive 2011/65/EU.

M/A-COM Technology Solutions Inc. (MACOM) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice.

Visit www.macom.com for additional data sheets and product information.

For further information and support please visit:

https://www.macom.com/support

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MAAP-015036-DIE	TE	获取价格	Dual Sided Bias Architecture
MAAP-015036-DIEEV1	TE	获取价格	Dual Sided Bias Architecture
MAAP-015036-DIEEV2	TE	获取价格	Dual Sided Bias Architecture
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