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M74VHC1G126DFT1G PDF预览

M74VHC1G126DFT1G

更新时间: 2024-11-03 21:53:39
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
6页 79K
描述
Noninverting 3−State Buffer

M74VHC1G126DFT1G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOT-353
包装说明:SC-88A, 5 PIN针数:5
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:1.05
控制类型:ENABLE HIGH系列:AHC/VHC
JESD-30 代码:R-PDSO-G5JESD-609代码:e3
长度:2 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.008 A
湿度敏感等级:1位数:1
功能数量:1端口数量:2
端子数量:5最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP5/6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):260
电源:2/5.5 V最大电源电流(ICC):0.04 mA
Prop。Delay @ Nom-Sup:10.5 ns传播延迟(tpd):16 ns
认证状态:Not Qualified座面最大高度:1.1 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:1.25 mm

M74VHC1G126DFT1G 数据手册

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MC74VHC1G126  
Noninverting 3−State Buffer  
The MC74VHC1G126 is an advanced high speed CMOS  
noninverting 3−state buffer fabricated with silicon gate CMOS  
technology. It achieves high speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining CMOS low power  
dissipation.  
The internal circuit is composed of three stages, including a buffered  
3−state output which provides high noise immunity and stable output.  
The MC74VHC1G126 input structure provides protection when  
voltages up to 7.0 V are applied, regardless of the supply voltage. This  
allows the MC74VHC1G126 to be used to interface 5.0 V circuits to  
3.0 V circuits.  
http://onsemi.com  
MARKING  
DIAGRAMS  
5
5
1
W2 M G  
SC−88A/SOT−353/SC−70  
DF SUFFIX  
G
Features  
1
5
High Speed: t = 3.5 ns (Typ) at V = 5.0 V  
CASE 419A  
PD  
CC  
Low Power Dissipation: I = 1 mA (Max) at T = 25°C  
CC  
A
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
5
W2 AYW G  
Pin and Function Compatible with Other Standard Logic Families  
Chip Complexity: FETs = 58; Equivalent Gates = 15  
Pb−Free Packages are Available  
G
1
TSOP−5/SOT−23/SC−59  
DT SUFFIX  
1
CASE 483  
W2  
M
A
= Device Code  
= Date Code*  
= Assembly Location  
= Year  
Y
5
1
2
3
V
CC  
OE  
IN A  
GND  
W
G
= Work Week  
= Pb−Free Package  
(Note: Microdot may be in either location)  
*Date Code orientation and/or position may  
vary depending upon manufacturing location.  
4
OUT Y  
PIN ASSIGNMENT  
1
2
3
4
5
OE  
Figure 1. Pinout (Top View)  
IN A  
GND  
OUT Y  
V
CC  
OE  
IN A  
EN  
OUT Y  
FUNCTION TABLE  
OE Input  
A Input  
Y Output  
Figure 2. Logic Symbol  
L
H
X
H
H
L
L
H
Z
ORDERING INFORMATION  
See detailed ordering and shipping information in the  
package dimensions section on page 4 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
August, 2005 − Rev. 13  
MC74VHC1G126/D  

M74VHC1G126DFT1G 替代型号

型号 品牌 替代类型 描述 数据表
M74VHC1G126DFT2G ONSEMI

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