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M74HCT32C1R PDF预览

M74HCT32C1R

更新时间: 2024-11-22 23:01:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输入元件
页数 文件大小 规格书
9页 234K
描述
QUAD 2-INPUT OR GATE

M74HCT32C1R 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFN包装说明:CC-20
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.84
系列:HCTJESD-30 代码:S-PQCC-J20
JESD-609代码:e3长度:8.9662 mm
负载电容(CL):50 pF逻辑集成电路类型:OR GATE
最大I(ol):0.004 A功能数量:4
输入次数:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC20,.4SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:26 ns
传播延迟(tpd):26 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:4.57 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8.9662 mmBase Number Matches:1

M74HCT32C1R 数据手册

 浏览型号M74HCT32C1R的Datasheet PDF文件第2页浏览型号M74HCT32C1R的Datasheet PDF文件第3页浏览型号M74HCT32C1R的Datasheet PDF文件第4页浏览型号M74HCT32C1R的Datasheet PDF文件第5页浏览型号M74HCT32C1R的Datasheet PDF文件第6页浏览型号M74HCT32C1R的Datasheet PDF文件第7页 
M54HCT32  
M74HCT32  
QUAD 2-INPUT OR GATE  
.
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.
.
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HIGH SPEED  
tPD = 12 ns (TYP.) AT VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 1 µA (MAX.) AT TA = 25 °C  
COMPATIBLE WITH TTL OUTPUTS  
VIH = 2V (MIN.) VIL = 0.8V (MAX)  
OUTPUT DRIVE CAPABILITY  
10 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
IOH = IOL = 4 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
PIN AND FUNCTION COMPATIBLE WITH  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
54/74LS32  
ORDER CODES :  
M54HCT32F1R  
M74HCT32B1R  
M74HCT32M1R  
M74HCT32C1R  
DESCRIPTION  
The M54/74HCT32 is a high speed CMOS 2-INPUT  
OR GATE fabricated in silicon gate C2MOS technol-  
ogy. It has the same high speed performance of  
LSTTL combined with true CMOS low power con-  
sumption. It achieves the high speed operation similar  
to equivalent LSTTL while maintaining the CMOS low  
power dissipation. The internal circuit is composed of  
2 stages including buffered output, which gives high  
noise immunity and a stable output. All inputs are  
equipped with protection circuits against static dis-  
charge and transient excess voltage.  
PIN CONNECTIONS (top view)  
This integrated circuit has input and output charac-  
teristics that are fully compatible with 54/74 LSTTL  
logic families. M54/74HCT devices are designed to  
directly interface HSC2MOS systems with TTL and  
NMOS components. They are also plug in replace-  
ments for LSTTL devices giving a reduction of  
power consumption.  
INPUT AND OUTPUT EQUIVALENT CIRCUIT  
NC =  
No Internal  
Connection  
February 1993  
1/9  

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