5秒后页面跳转
M74HCT367TTR PDF预览

M74HCT367TTR

更新时间: 2024-11-19 03:09:47
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
9页 203K
描述
HEX BUS BUFFER WITH 3 STATE OUTPUT NON INVERTING

M74HCT367TTR 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP16,.25针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.45控制类型:ENABLE LOW
系列:HCTJESD-30 代码:R-PDSO-G16
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.006 A
位数:6功能数量:1
端口数量:2端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
电源:5 VProp。Delay @ Nom-Sup:33 ns
传播延迟(tpd):42 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

M74HCT367TTR 数据手册

 浏览型号M74HCT367TTR的Datasheet PDF文件第2页浏览型号M74HCT367TTR的Datasheet PDF文件第3页浏览型号M74HCT367TTR的Datasheet PDF文件第4页浏览型号M74HCT367TTR的Datasheet PDF文件第5页浏览型号M74HCT367TTR的Datasheet PDF文件第6页浏览型号M74HCT367TTR的Datasheet PDF文件第7页 
M74HCT367  
HEX BUS BUFFER  
WITH 3 STATE OUTPUT NON INVERTING  
HIGH SPEED:  
= 14ns (TYP.) at V = 4.5V  
t
PD  
CC  
LOW POWER DISSIPATION:  
= 4µA(MAX.) at T =25°C  
I
CC  
A
COMPATIBLE WITH TTL OUTPUTS :  
= 2V (MIN.) V = 0.8V (MAX)  
V
IH  
IL  
DIP  
SOP  
TSSOP  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 6mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 367  
TUBE  
T & R  
DIP  
SOP  
M74HCT367B1R  
M74HCT367M1R M74HCT367RM13TR  
M74HCT367TTR  
DESCRIPTION  
The M74HCT367 is an high speed CMOS HEX  
BUS BUFFER 3-STATE OUTPUTS fabricated  
TSSOP  
2
with silicon gate C MOS technology.  
and when held high, these outputs are disabled in  
a high-impedance state.  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
This device contains six buffers, four buffers are  
controlled by an enable input (G1) and the other  
two buffers are controlled by the other enable  
input (G2); the outputs of each buffer group are  
enabled when G1 and/or G2 inputs are held low,  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
September 2001  
1/9  

与M74HCT367TTR相关器件

型号 品牌 获取价格 描述 数据表
M74HCT368 STMICROELECTRONICS

获取价格

HEX BUS BUFFER 3-STATE HCT367 NONINVERTING, HCT368 INVERTING
M74HCT368B1R STMICROELECTRONICS

获取价格

HEX BUS BUFFER 3-STATE HCT367 NONINVERTING, HCT368 INVERTING
M74HCT368C1R STMICROELECTRONICS

获取价格

HEX BUS BUFFER 3-STATE HCT367 NONINVERTING, HCT368 INVERTING
M74HCT368M1R STMICROELECTRONICS

获取价格

HEX BUS BUFFER 3-STATE HCT367 NONINVERTING, HCT368 INVERTING
M74HCT368RM13TR STMICROELECTRONICS

获取价格

HCT SERIES, 6-BIT DRIVER, INVERTED OUTPUT, PDSO16, SO-16
M74HCT368TTR STMICROELECTRONICS

获取价格

HCT SERIES, 6-BIT DRIVER, INVERTED OUTPUT, PDSO16, TSSOP-16
M74HCT373 STMICROELECTRONICS

获取价格

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HCT373 NON INVERTING - HCT533 INVERTING
M74HCT373B1R STMICROELECTRONICS

获取价格

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HCT373 NON INVERTING - HCT533 INVERTING
M74HCT373C1R STMICROELECTRONICS

获取价格

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HCT373 NON INVERTING - HCT533 INVERTING
M74HCT373M1R STMICROELECTRONICS

获取价格

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HCT373 NON INVERTING - HCT533 INVERTING