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M74HCT257TTR PDF预览

M74HCT257TTR

更新时间: 2024-10-02 20:43:15
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
10页 69K
描述
HCT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16, TSSOP-16

M74HCT257TTR 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP16,.25针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.32系列:HCT
JESD-30 代码:R-PDSO-G16长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:MULTIPLEXER
最大I(ol):0.006 A功能数量:4
输入次数:2输出次数:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL电源:5 V
Prop。Delay @ Nom-Sup:30 ns传播延迟(tpd):30 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Multiplexer/Demultiplexers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:4.4 mmBase Number Matches:1

M74HCT257TTR 数据手册

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M74HCT257  
QUAD 2 CHANNEL MULTIPLEXER (3-STATE)  
HIGH SPEED :  
= 13 ns (TYP.) at V = 4.5V  
t
PD  
CC  
LOW POWER DISSIPATION:  
=4µA(MAX.) at T =25°C  
I
CC  
A
COMPATIBLE WITH TTL OUTPUTS :  
= 2V (MIN.) V = 0.8V (MAX)  
V
IH  
IL  
DIP  
SOP  
TSSOP  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 6mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 257  
TUBE  
T & R  
DIP  
SOP  
M74HCT257B1R  
M74HCT257M1R M74HCT257RM13TR  
M74HCT257TTR  
DESCRIPTION  
The M74HCT257 is an high speed CMOS QUAD  
TSSOP  
2
CHANNEL  
MULTIPLEXER  
(3-STATE)  
2
fabricated with silicon gate C MOS technology.  
This IC is composed of an independent 2-channel  
multiplexer with common SELECT and ENABLE  
(OE) input.  
the IC become in a High-Impedance state. If  
SELECT input is held low, ”A” data is selected,  
when SELECT is high , ”B” data is chosen.  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
The M74HCT257 is a non-inverting multiplexer.  
When the ENABLE input is held ”High”, outputs of  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
August 2001  
1/10  

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