5秒后页面跳转
M74HCT138B1R PDF预览

M74HCT138B1R

更新时间: 2024-11-01 22:34:35
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
10页 244K
描述
3 TO 8 LINE DECODER INVERTING

M74HCT138B1R 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.26其他特性:3 ENABLE INPUTS
系列:HCT输入调节:STANDARD
JESD-30 代码:R-PDIP-T16JESD-609代码:e3
负载电容(CL):50 pF逻辑集成电路类型:OTHER DECODER/DRIVER
最大I(ol):0.004 A功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE包装方法:TUBE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:45 ns传播延迟(tpd):45 ns
认证状态:Not Qualified座面最大高度:5.1 mm
子类别:Decoder/Drivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Matte Tin (Sn)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

M74HCT138B1R 数据手册

 浏览型号M74HCT138B1R的Datasheet PDF文件第2页浏览型号M74HCT138B1R的Datasheet PDF文件第3页浏览型号M74HCT138B1R的Datasheet PDF文件第4页浏览型号M74HCT138B1R的Datasheet PDF文件第5页浏览型号M74HCT138B1R的Datasheet PDF文件第6页浏览型号M74HCT138B1R的Datasheet PDF文件第7页 
M54HCT138  
M74HCT138  
3 TO 8 LINE DECODER (INVERTING)  
.
.
.
.
.
.
.
HIGH SPEED  
PD = 16 ns (TYP.) at VCC = 5 V  
LOW POWER DISSIPATION  
CC = 4 µA AT TA = 25 °C  
OUTPUT DRIVE CAPABILITY  
10 LSTTL LOADS  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
SYMMETRICAL OUTPUT IMPEDANCE  
|IOH| = IOL  
COMPATIBLE WITH TTL OUTPUTS  
VIH = 2V (MIN.) VIL = 0.8V (MAX)  
PIN AND FUNCTION COMPATIBLE  
WITH 54/74LS138  
t
I
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
ORDER CODES :  
DESCRIPTION  
M54HCT138F1R  
M74HCT138M1R  
The M54/74HC138 is a high speed CMOS 3 TO 8  
LINE DECODER fabricated in silicon gate C2MOS  
technology. It has the same high speed perform-  
ance of LSTTL combinedwithtrue CMOSlowpower  
consumption. If the device is enabled, 3 binary se-  
lect inputs (A, B and C) determine which one of the  
outputs will go low. If enable input G1 is held low or  
either G2A or G2B is held high, the decoding func-  
tion is inhibited and all the 8 outputs go high. Three  
enable inputs are provided toease cascade connec-  
tion and application of address decoders for mem-  
ory systems. All inputs are equipped with protection  
circuits against static discharge and tran- sient ex-  
cess voltage.This integrated circuit has input and  
output characteristics that are fully compatible with  
54/74 LSTTL logic families. M54/74HCT devices  
are designed to directly interface HSC2MOS sys-  
tems with TTL and NMOS components. They are  
also plug in replacements for LSTTL devices giving  
a reduction of power consumption.  
M74HCT138B1R  
M74HCT138C1R  
PIN CONNECTIONS (top view)  
INPUT AND OUTPUT EQUIVALENT CIRCUIT  
NC =  
No Internal  
Connection  
February 1993  
1/10  

M74HCT138B1R 替代型号

型号 品牌 替代类型 描述 数据表
SN74LS138N TI

功能相似

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SN74HCT138N TI

功能相似

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SN74HCT138D TI

功能相似

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

与M74HCT138B1R相关器件

型号 品牌 获取价格 描述 数据表
M74HCT138C1R STMICROELECTRONICS

获取价格

3 TO 8 LINE DECODER INVERTING
M74HCT138M1R STMICROELECTRONICS

获取价格

3 TO 8 LINE DECODER INVERTING
M74HCT138RM13TR STMICROELECTRONICS

获取价格

3 TO 8 LINE DECODER (INVERTING)
M74HCT138TTR STMICROELECTRONICS

获取价格

3 TO 8 LINE DECODER (INVERTING)
M74HCT139 STMICROELECTRONICS

获取价格

DUAL 2 TO 4 DECODER/DEMULTIPLEXER
M74HCT139B1R STMICROELECTRONICS

获取价格

DUAL 2 TO 4 DECODER/DEMULTIPLEXER
M74HCT139C1R STMICROELECTRONICS

获取价格

DUAL 2 TO 4 DECODER/DEMULTIPLEXER
M74HCT139M1R STMICROELECTRONICS

获取价格

DUAL 2 TO 4 DECODER/DEMULTIPLEXER
M74HCT139RM13TR STMICROELECTRONICS

获取价格

DUAL 2 TO 4 DECODER/DEMULTIPLEXER
M74HCT139TTR STMICROELECTRONICS

获取价格

DUAL 2 TO 4 DECODER/DEMULTIPLEXER