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M74HCT139TTR PDF预览

M74HCT139TTR

更新时间: 2024-11-02 03:15:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 解码器解复用器
页数 文件大小 规格书
9页 263K
描述
DUAL 2 TO 4 DECODER/DEMULTIPLEXER

M74HCT139TTR 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.33
系列:HCT输入调节:STANDARD
JESD-30 代码:R-PDSO-G16长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:OTHER DECODER/DRIVER
最大I(ol):0.004 A功能数量:2
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
电源:5 VProp。Delay @ Nom-Sup:45 ns
传播延迟(tpd):45 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Decoder/Drivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:4.4 mm
Base Number Matches:1

M74HCT139TTR 数据手册

 浏览型号M74HCT139TTR的Datasheet PDF文件第2页浏览型号M74HCT139TTR的Datasheet PDF文件第3页浏览型号M74HCT139TTR的Datasheet PDF文件第4页浏览型号M74HCT139TTR的Datasheet PDF文件第5页浏览型号M74HCT139TTR的Datasheet PDF文件第6页浏览型号M74HCT139TTR的Datasheet PDF文件第7页 
M74HCT139  
DUAL 2 TO 4 DECODER/DEMULTIPLEXER  
HIGH SPEED:  
= 17ns (TYP.) at V = 4.5V  
t
PD  
CC  
LOW POWER DISSIPATION:  
= 4µA(MAX.) at T =25°C  
I
CC  
A
COMPATIBLE WITH TTL OUTPUTS :  
= 2V (MIN.) V = 0.8V (MAX)  
V
IH  
IL  
DIP  
SOP  
TSSOP  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 4mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
PACKAGE  
t
t
PLH  
PHL  
TUBE  
T & R  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 139  
DIP  
SOP  
M74HCT139B1R  
M74HCT139M1R M74HCT139RM13TR  
M74HCT139TTR  
TSSOP  
DESCRIPTION  
The M74HCT139 is an high speed CMOS DUAL  
TWO LINE TO FOUR LINE DECODER/  
DEMULTIPLEXER fabricated with silicon gate  
C MOS technology.  
The active low enable input can be used for gating  
or as a data input for demultiplexing applications.  
While the enable input is held high, all four outputs  
are high independently of the other inputs.  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
2
PIN CONNECTION AND IEC LOGIC SYMBOLS  
July 2001  
1/9  

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