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M74HC643 PDF预览

M74HC643

更新时间: 2024-11-28 22:57:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线收发器输出元件
页数 文件大小 规格书
11页 340K
描述
OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS INVERTING/NON INVERTING

M74HC643 数据手册

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M74HC643  
OCTAL BUS TRANSCEIVER  
WITH 3 STATE OUTPUTS (INVERTING/NON INVERTING)  
HIGH SPEED:  
t
= 10ns (TYP.) at V = 6V  
PD  
CC  
LOW POWER DISSIPATION:  
= 4µA(MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28 % V (MIN.)  
V
NIH  
NIL  
CC  
DIP  
SOP  
TSSOP  
T & R  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 6mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
WIDE OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
TUBE  
V
CC  
DIP  
SOP  
M74HC643B1R  
M74HC643M1R  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 643  
M74HC643RM13TR  
M74HC643TTR  
TSSOP  
DESCRIPTION  
The 74HC643 is an advanced high-speed CMOS  
DIR input. The enable input G can be used to  
disable the device so that the buses are effectively  
isolated.  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
OCTAL  
BUS  
TRANSCEIVER  
(3-STATE)  
2
fabricated with silicon gate C MOS technology.  
This IC is intended for two-way asynchronous  
communication between data buses, and the  
direction of data transmission is determined by  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
August 2001  
1/11  

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暂无描述
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