M74HC595YTTR

更新时间： 2024-11-27 17:33:19

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		锁存器移位寄存器
页数	文件大小	规格书
13页	284K
描述
8位移位寄存器输出锁存器（3态）

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中文翻译

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数据手册
替代型号

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M74HC595YTTR 数据手册

M54HC595

M74HC595

8 BIT SHIFT REGISTER WITH OUTPUT LATCHES (3 STATE)

HIGH SPEED

f_MAX= 55 MHz (TYP.) AT V_CC= 5 V

LOW POWER DISSIPATION

I_CC= 4 µA (MAX.) AT T_A= 25 °C

HIGH NOISE IMMUNITY

V_NIH= V_NIL= 28 % V_CC(MIN.)

OUTPUT DRIVE CAPABILITY

B1R

(Plastic Package)

F1R

15 LSTTL LOADS FOR QA TO QH

10 LSTTL LOADS FOR QH’

(Ceramic Package)

SYMMETRICAL OUTPUT IMPEDANCE

|I_OH| = I_OL= 6 mA (MIN.) FOR QA TO QH

|I_OH| = I_OL= 4 mA (MIN.) FOR QH’

BALANCED PROPAGATION DELAYS

t_PLH= t_PHL

WIDE OPERATING VOLTAGE RANGE

V_CC(OPR) = 2 V TO 6 V

PIN AND FUNCTION COMPATIBLE

M1R

(Micro Package)

C1R

(Chip Carrier)

ORDER CODES :

M54HC595F1R

M74HC595B1R

M74HC595M1R

M74HC595C1R

WITH LSTTL 54/74LS595

PIN CONNECTIONS (top view)

DESCRIPTION

The M54/74HC595 is a high speed CMOS 8-BIT

SHIFT REGISTERS/OUTPUT LATCHES (3-

STATE) fabricated in silicon C²MOS technology. It

has the same high speed performance of LSTTL

combined with true CMOS low power consumption.

This device contains an 8-bit serial-in, parallel-out

shift register that feeds an 8-bit D-type storage reg-

ister. The storage register has 8 3-STATE outputs.

Separate clocks are provided for both the shift reg-

ister and the storage register.

The shift register has a direct-overriding clear, serial

input, and serial output (standard) pins for cascad-

ing. Both the shift register and storage register use

positive-edge triggered clocks. If both clocks are

connected together, the shift register state will al-

ways be one clock pulse ahead of the storage reg-

ister.

NC =

All inputs are equipped with protection circuits

against static discharge and transient excess volt-

age.

No Internal

Connection

April 1993

1/13

12 3 4 5 6 7...13

中文翻译

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M74HC595YTTR 替代型号

型号	品牌	替代类型	描述	数据表
M74HC595TTR	STMICROELECTRONICS	类似代替	8 BIT SHIFT REGISTER WITH OUTPUT LATCHES (3 STATE)

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