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M74HC164TTR PDF预览

M74HC164TTR

更新时间: 2024-01-05 07:03:34
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 移位寄存器
页数 文件大小 规格书
13页 513K
描述
8 BIT SIPO SHIFT REGISTER

M74HC164TTR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP14,.25针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:7.6计数方向:RIGHT
系列:HC/UHJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
逻辑集成电路类型:SERIAL IN PARALLEL OUT最大频率@ Nom-Sup:30000000 Hz
湿度敏感等级:1位数:8
功能数量:1端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:2/6 V
传播延迟(tpd):240 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Shift Registers
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30触发器类型:POSITIVE EDGE
宽度:4.4 mm最小 fmax:25 MHz
Base Number Matches:1

M74HC164TTR 数据手册

 浏览型号M74HC164TTR的Datasheet PDF文件第2页浏览型号M74HC164TTR的Datasheet PDF文件第3页浏览型号M74HC164TTR的Datasheet PDF文件第4页浏览型号M74HC164TTR的Datasheet PDF文件第5页浏览型号M74HC164TTR的Datasheet PDF文件第6页浏览型号M74HC164TTR的Datasheet PDF文件第7页 
M74HC164  
8 BIT SIPO SHIFT REGISTER  
HIGH SPEED :  
= 62MHz (TYP.) at V = 6V  
f
MAX  
CC  
LOW POWER DISSIPATION:  
=4µA(MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28 % V (MIN.)  
V
NIH  
NIL  
CC  
DIP  
SOP  
TSSOP  
T & R  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 4mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
WIDE OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
TUBE  
V
CC  
DIP  
SOP  
M74HC164B1R  
M74HC164M1R  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 164  
M74HC164RM13TR  
M74HC164TTR  
TSSOP  
DESCRIPTION  
The M74HC164 is an high speed CMOS 8 BIT  
SIPO SHIFT REGISTER fabricated with silicon  
gate C MOS technology.  
The M74HC164 is an 8 bit shift register with serial  
data entry and an output from each of the eight  
stages. Data is entered serially through one of two  
inputs (A or B), either of these inputs can be used  
as an active high enable for data entry through the  
other input. An unused input must be high, or both  
inputs connected together. Each low-to-high  
transition on the clock inputs shifts data one place  
to the right and enters into QA the logic NAND of  
the two data inputs (A x B), the data that existed  
before the rising clock edge. A low level on the  
clear input overrides all other inputs and clears the  
register asynchronously, forcing all Q outputs low.  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
2
PIN CONNECTION AND IEC LOGIC SYMBOLS  
June 2003  
1/13  

M74HC164TTR 替代型号

型号 品牌 替代类型 描述 数据表
MC74HC164ADTR2G ONSEMI

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