Datasheet > 存储 > SRAM> M5M5T5636UG-20

M5M5T5636UG-20

更新时间： 2024-11-30 22:13:39

品牌	Logo	应用领域
三菱 - MITSUBISHI		存储内存集成电路静态存储器时钟
页数	文件大小	规格书
23页	287K
描述
18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM

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技术参数
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M5M5T5636UG-20 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
零件包装代码：	BGA	包装说明：	BGA, BGA165,11X15,40
针数：	165	Reach Compliance Code：	unknown
ECCN代码：	3A991.B.2.A	HTS代码：	8542.32.00.41
风险等级：	5.67	Is Samacsys：	N
最长访问时间：	3.2 ns	其他特性：	PIPELINED ARCHITECTURE
最大时钟频率 (fCLK)：	200 MHz	I/O 类型：	COMMON
JESD-30 代码：	R-PBGA-B165	JESD-609代码：	e0
内存密度：	18874368 bit	内存集成电路类型：	STANDARD SRAM
内存宽度：	36	功能数量：	1
端子数量：	165	字数：	524288 words
字数代码：	512000	工作模式：	SYNCHRONOUS
最高工作温度：	70 °C	最低工作温度：
组织：	512KX36	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	BGA
封装等效代码：	BGA165,11X15,40	封装形状：	RECTANGULAR
封装形式：	GRID ARRAY	并行/串行：	PARALLEL
电源：	1.8/2.5,2.5 V	认证状态：	Not Qualified
最大待机电流：	0.03 A	最小待机电流：	2.38 V
子类别：	SRAMs	最大压摆率：	0.44 mA
最大供电电压 (Vsup)：	2.625 V	最小供电电压 (Vsup)：	2.375 V
标称供电电压 (Vsup)：	2.5 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	BALL
端子节距：	1 mm	端子位置：	BOTTOM
Base Number Matches：	1

M5M5T5636UG-20 数据手册

MITSUBISHI LSIs

2001.March Rev.0.1

Advanced Information

Some parametric limits are subject to change.

M5M5T5636UG – 25,22,20

Notice: This is not final specification.

18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM

DESCRIPTION

APPLICATION

The M5M5T5636UG is a family of 18M bit synchronous SRAMs

organized as 524288-words by 36-bit. It is designed to eliminate

dead bus cycles when turning the bus around between reads and

writes, or writes and reads. Mitsubishi's SRAMs are fabricated

with high performance, low power CMOS technology, providing

greater reliability. M5M5T5636UG operates on 2.5V power/ 1.8V

I/O supply or a single 2.5V power supply and are 2.5V CMOS

compatible.

High-end networking products that require high bandwidth, such

as switches and routers.

FUNCTION

Synchronous circuitry allows for precise cycle control

triggered by a positive edge clock transition.

Synchronous signals include : all Addresses, all Data Inputs, all

Chip Enables (E1#, E2, E3#), Address Advance/Load (ADV),

Clock Enable (CKE#), Byte Write Enables (BWa#, BWb#, BWc#,

BWd#) and Read/Write (W#). Write operations are controlled by

the four Byte Write Enables (BWa# - BWd#) and Read/Write(W#)

inputs. All writes are conducted with on-chip synchronous self-

timed write circuitry.

Asynchronous inputs include Output Enable (G#), Clock (CLK)

and Snooze Enable (ZZ). The HIGH input of ZZ pin puts the

SRAM in the power-down state.The Linear Burst order (LBO#) is

DC operated pin. LBO# pin will allow the choice of either an

interleaved burst, or a linear burst.

FEATURES

• Fully registered inputs and outputs for pipelined operation

• Fast clock speed: 250, 225, and 200 MHz

• Fast access time: 2.6, 2.8, 3.2 ns

• Single 2.5V -5% and +5% power supply VDD

• Separate VDDQ for 2.5V or 1.8V I/O

• Individual byte write (BWa# - BWd#) controls may be tied

LOW

• Single Read/Write control pin (W#)

All read, write and deselect cycles are initiated by the ADV

LOW input. Subsequent burst address can be internally

generated as controlled by the ADV HIGH input.

• CKE# pin to enable clock and suspend operations

• Internally self-timed, registers outputs eliminate the need to

control G#

• Snooze mode (ZZ) for power down

• Linear or Interleaved Burst Modes

• Three chip enables for simple depth expansion

• JTAG boundary scan support

Package

165(11x15) bump BGA

Body Size (13mm x 15mm)

Bump Pitch 1.0mm

PART NAME TABLE

Active Current

(max.)

Standby Current

(max.)

Part Name

Frequency

250MHz

225MHz

200MHz

Access

2.6ns

2.8ns

3.2ns

Cycle

4.0ns

4.4ns

5.0ns

M5M5T5636UG - 25

M5M5T5636UG - 22

M5M5T5636UG - 20

400mA

380mA

360mA

20mA

Advanced Information

M5M5T5636UG REV.0.1

MITSUBISHI

ELECTRIC

12 3 4 5 6 7...23

中文翻译

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与M5M5T5636UG-20相关器件

型号	品牌	获取价格	描述	数据表
M5M5T5636UG-22	MITSUBISHI	获取价格	18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
M5M5T5636UG-22	RENESAS	获取价格	MITSUBISHI LSIs 18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
M5M5T5636UG-25	RENESAS	获取价格	MITSUBISHI LSIs 18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
M5M5T5636UG-25	MITSUBISHI	获取价格	18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
M5M5T5672TG	RENESAS	获取价格	18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM
M5M5T5672TG-20	RENESAS	获取价格	18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM
M5M5T5672TG-22	RENESAS	获取价格	18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM
M5M5T5672TG-25	RENESAS	获取价格	18874368-BIT(262144-WORD BY 72-BIT) NETWORK SRAM
M5M5V1004CJ-20T	MITSUBISHI	获取价格	Standard SRAM, 256KX4, 20ns, CMOS, PDSO28, 0.400 INCH, PLASTIC, SOJ-28
M5M5V108CFP-10H	MITSUBISHI	获取价格	1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM

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