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M54HC373F1R PDF预览

M54HC373F1R

更新时间： 2024-11-05 22:22:03
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
13页 273K
描述
OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HC373 NON INVERTING - HC533 INVERTING

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中文翻译

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M54HC373F1R 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Obsolete零件包装代码：DIP
包装说明：CERAMIC, DIP-20针数：20
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
风险等级：5.16Is Samacsys：N
系列：HC/UHJESD-30 代码：R-GDIP-T20
JESD-609代码：e0负载电容（CL）：150 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.006 A
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装等效代码：DIP20,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：2/6 VProp。Delay @ Nom-Sup：38 ns
传播延迟（tpd）：53 ns认证状态：Not Qualified
座面最大高度：5.71 mm子类别：FF/Latches
最大供电电压 (Vsup)：6 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：5 V表面贴装：NO
技术：CMOS温度等级：MILITARY
端子面层：Tin/Lead (Sn/Pb)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.62 mm
Base Number Matches：1

M54HC373F1R 数据手册

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M54/74HC373  
M54/74HC533  
OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT  
HC373 NON INVERTING - HC533 INVERTING  
.
.
.
.
.
.
.
.
HIGH SPEED  
PD = 11 ns (TYP.) AT VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 4 µA (MAX.) AT TA = 25 °C  
HIGH NOISE IMMUNITY  
t
V
NIH = VNIL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
15 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
IOL = IOH = 6 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
VCC (OPR) = 2 V TO 6 V  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
PIN AND FUNCTION COMPATIBLE  
WITH 54/74LS373/533  
ORDER CODES :  
M54HCXXXF1R  
M74HCXXXB1R  
M74HCXXXM1R  
M74HCXXXC1R  
DESCRIPTION  
The M54/74HC373/533 are high speed CMOS  
OCTAL LATCH WITH 3-STATE OUTPUTS  
fabricated with in silicon gate C2MOS technology.  
of D input data. While the OE input is at low level,  
the eight outputs will be in a normal logic state (high  
or low logic level) and while high level the outpts will  
be in a high impedance state.  
These ICs achive the high speed operation similar  
to equivalent LSTTL while maintaning the CMOS  
low power dissipation.  
The application designer has  
a choise of  
combination of inverting and non inverting outputs.  
These 8 bit D-Type latches are controlled by a latch  
enable input (LE) and a output enable input (OE).  
The three state output configuration and the wide  
choise of outline make bus organized system  
simple.  
While the LE input is held at a high level, the Q  
outputs will follow the data input precisely or  
inversely. When the LE is taken low, the Q outputs  
will be latched precisely or inversely at the logic level  
All inputs are equipped with protection circuits  
against discharge and transient excess voltage.  
PIN CONNECTION (top view)  
HC373  
HC533  
HC373  
HC533  
October 1993  
1/13  
1234567...13

中文翻译

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与M54HC373F1R相关器件

型号 品牌 获取价格 描述 数据表
M54HC373K STMICROELECTRONICS

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 		RAD-HARD OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
M54HC373K1 STMICROELECTRONICS

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 		RAD-HARD OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
M54HC373KG STMICROELECTRONICS

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 		Rad-Hard Octal D-Type Latch 3-State
M54HC373KT STMICROELECTRONICS

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 		抗辐照八路D型3态锁存器
M54HC373M1R STMICROELECTRONICS

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 		OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HC373 NON INVERTING - HC533 INVERTING
M54HC374 STMICROELECTRONICS

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 		OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HC374 NON INVERTING - HC534 INVERTING
M54HC374B1R STMICROELECTRONICS

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 		OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HC374 NON INVERTING - HC534 INVERTING
M54HC374C1R STMICROELECTRONICS

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 		OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HC374 NON INVERTING - HC534 INVERTING
M54HC374D STMICROELECTRONICS

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 		RAD-HARD OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING
M54HC374D1 STMICROELECTRONICS

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 		RAD-HARD OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING

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