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M54HC365B1R PDF预览

M54HC365B1R

更新时间: 2024-11-04 22:57:51
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
11页 233K
描述
HEX BUS BUFFER 3-STATE HC365 NON INVERTING- HC366 INVERTING

M54HC365B1R 数据手册

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M54HC365  
RAD-HARD HEX BUS BUFFER  
WITH 3 STATE OUTPUTS (NON INVERTING)  
HIGH SPEED:  
= 10ns (TYP.) at V  
t
= 6V  
CC  
PD  
LOW POWER DISSIPATION:  
= 4µA(MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
V
NIH  
NIL  
CC  
DILC-16  
FPC-16  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 6mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
WIDE OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
FM  
EM  
V
CC  
DILC  
FPC  
M54HC365D  
M54HC365K  
M54HC365D1  
M54HC365K1  
PIN AND FUNCTION COMPATIBLE WITH  
54 SERIES 365  
SPACE GRADE-1: ESA SCC QUALIFIED  
50 krad QUALIFIED, 100 krad AVAILABLE ON  
REQUEST  
NO SEL UNDER HIGH LET HEAVY IONS  
IRRADIATION  
All six buffers are controlled by the combination of  
two enable inputs (G1 and G2); all outputs of  
these buffers are enabled only when both G1 and  
G2 inputs are held low, under all other conditions  
these outputs are disabled in a high-impedance  
state.  
DEVICE FULLY COMPLIANT WITH  
SCC-9401-052  
The M54HC365 has non inverting outputs.  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
DESCRIPTION  
The 54HC365 is an advanced high-speed CMOS  
HEX BUS BUFFER (3-STATE) fabricated with  
2
silicon gate C MOS technology.  
PIN CONNECTION  
Rev. 1  
1/11  
May 2004  

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