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M54HC367KT PDF预览

M54HC367KT

更新时间: 2024-11-06 13:10:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
11页 249K
描述
Rad-Hard Hex Bus Buffer 3-State

M54HC367KT 技术参数

生命周期:Not RecommendedReach Compliance Code:compliant
风险等级:5.77逻辑集成电路类型:BUS DRIVER
Base Number Matches:1

M54HC367KT 数据手册

 浏览型号M54HC367KT的Datasheet PDF文件第2页浏览型号M54HC367KT的Datasheet PDF文件第3页浏览型号M54HC367KT的Datasheet PDF文件第4页浏览型号M54HC367KT的Datasheet PDF文件第5页浏览型号M54HC367KT的Datasheet PDF文件第6页浏览型号M54HC367KT的Datasheet PDF文件第7页 
M54HC367  
RAD-HARD HEX BUS BUFFER  
WITH 3 STATE OUTPUT NON INVERTING  
HIGH SPEED:  
= 9ns (TYP.) at V = 6V  
t
PD  
CC  
LOW POWER DISSIPATION:  
= 4µA(MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
V
NIH  
NIL  
CC  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 6mA (MIN)  
DILC-16  
FPC-16  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
PLH  
PHL  
ORDER CODES  
PACKAGE  
WIDE OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
V
FM  
EM  
CC  
PIN AND FUNCTION COMPATIBLE WITH  
54 SERIES 367  
DILC  
FPC  
M54HC367D  
M54HC367K  
M54HC367D1  
M54HC367K1  
SPACE GRADE-1: ESA SCC QUALIFIED  
50 krad QUALIFIED, 100 krad AVAILABLE ON  
REQUEST  
NO SEL UNDER HIGH LET HEAVY IONS  
IRRADIATION  
This device contains six buffers, four buffers are  
controlled by an enable input (G1) and the other  
two buffers are controlled by the other enable  
input (G2); the outputs of each buffer group are  
enabled when G1 and/or G2 inputs are held low,  
and when held high, these outputs are disabled in  
a high-impedance state.  
DEVICE FULLY COMPLIANT WITH  
SCC-9401-044  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
DESCRIPTION  
The M54HC367 is an high speed CMOS HEX  
BUS BUFFER 3-STATE OUTPUTS fabricated  
2
with silicon gate C MOS technology.  
PIN CONNECTION  
Rev. 1  
1/11  
May 2004  

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