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M54HC148K1 PDF预览

M54HC148K1

更新时间: 2024-11-04 03:01:11
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 运算电路逻辑集成电路编码器
页数 文件大小 规格书
10页 230K
描述
RAD-HARD 8 TO 3 LINE PRIORITY ENCODER

M54HC148K1 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DFP
包装说明:CERAMIC, DFP-16针数:16
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.78Is Samacsys:N
系列:HC/UHJESD-30 代码:R-CDFP-F16
JESD-609代码:e0长度:9.94 mm
逻辑集成电路类型:ENCODER位数:8
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DFP
封装等效代码:FL16,.3封装形状:RECTANGULAR
封装形式:FLATPACK峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/6 V传播延迟(tpd):225 ns
认证状态:Not Qualified座面最大高度:2.38 mm
子类别:Arithmetic Circuits最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):4.5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.91 mmBase Number Matches:1

M54HC148K1 数据手册

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M54HC148  
RAD-HARD 8 TO 3 LINE PRIORITY ENCODER  
HIGH SPEED:  
= 16ns (TYP.) at V  
t
= 6V  
CC  
PD  
LOW POWER DISSIPATION:  
= 4µA(MAX.) at T =25°C  
I
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
V
NIH  
NIL  
CC  
DILC-16  
FPC-16  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 4mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
t
t
ORDER CODES  
PACKAGE  
PLH  
PHL  
WIDE OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
FM  
EM  
V
CC  
DILC  
FPC  
M54HC148D  
M54HC148K  
M54HC148D1  
M54HC148K1  
PIN AND FUNCTION COMPATIBLE WITH  
54 SERIES 148  
SPACE GRADE-1: ESA SCC QUALIFIED  
50 krad QUALIFIED, 100 krad AVAILABLE ON  
REQUEST  
NO SEL UNDER HIGH LET HEAVY IONS  
IRRADIATION  
The M54HC148 encodes eight data lines to  
three-line (4-2-1) binary (octal). Cascading  
circuitry (enable input EI and enable output EO)  
has been provided to allow octal expansion  
without the need for external circuitry. Data inputs  
are active at the low logic level.  
DEVICE FULLY COMPLIANT WITH  
SCC-9410-017  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
DESCRIPTION  
The M54HC148 is an high speed CMOS 8 TO 3  
LINE PRIORITY ENCODER fabricated with  
2
silicon gate C MOS technology.  
PIN CONNECTION  
March 2004  
1/10  

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