Datasheet > M54HC1520B1R

M54HC1520B1R

更新时间： 2024-11-20 22:46:39

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		计数器
页数	文件大小	规格书
13页	272K
描述
HC4518 DUAL DECADE COUNTER HC4520 DUAL 4 BIT BINARY COUNTER

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中文翻译

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数据手册

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M54HC1520B1R 数据手册

M54/M74HC4518

M54/M74HC4520

HC4518 DUAL DECADE COUNTER

HC4520 DUAL 4 BIT BINARY COUNTER

HIGH SPEED

f_MAX= 55 MHz (TYP.) at V_CC= 5 V

LOW POWER DISSIPATION

I_CC= 4 µA (MAX.) AT T_A= 25 °C

HIGH NOISE IMMUNITY

V_NIH= V_NIL= 28 % V_CC(MIN.)

OUTPUT DRIVE CAPABILITY

10 LSTTL LOADS

SYMMETRICAL OUTPUT IMPEDANCE

|I_OH| = I_OL= 4 mA (MIN.)

BALANCED PROPAGATION DELAYS

t_PLH= t_PHL

WIDE OPERATING VOLTAGE RANGE

B1R

(Plastic Package)

F1R

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

V_CC(OPR) = 2 V TO 6 V

PIN AND FUNCTION COMPATIBLE WITH

4520B/4518B

ORDER CODES :

M54HCXXXXF1R

M74HCXXXXB1R

M74HCXXXXM1R

M74HCXXXXC1R

PIN CONNECTIONS (top view)

DESCRIPTION

The M54/74HC4518/4520 are high speed CMOS

DUAL 4 BIT BINARY COUNTERS fabricated in sili-

con gate C²MOS technology. They have the same

high speed performance of LSTTL combined with

true CMOS low power consumption.

They consists of two identical internally syn-

chronous 4-stage counters. The counter stages are

D-type flip-flops having interchangeable Clock and

ENABLE inputs for incrementing on either the posi-

tive-going or negative-going transition.

For single-unit operation the ENABLE input is main-

tained ”high” and the counter advances on each

positive-going transition of the CLOCK. The

counters are cleared by high levels on their clear

lines. The counter can be cascaded in the ripple

mode by connecting Q4 to the enable input of the

subsequent counter whilethe clock input ofthe latter

is held permanently low.

NC =

All inputs are equipped with protection circuits

against static discharge and transient excess volt-

age.

No Internal

Connection

March 1993

1/13

12 3 4 5 6 7...13

中文翻译

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与M54HC1520B1R相关器件

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M54HC1520M1R	STMICROELECTRONICS	获取价格	HC4518 DUAL DECADE COUNTER HC4520 DUAL 4 BIT BINARY COUNTER
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