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M48Z35AV-70PC1 PDF预览

M48Z35AV-70PC1

更新时间: 2024-11-12 22:51:39
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
16页 127K
描述
256 Kbit 32Kb x8 ZEROPOWER SRAM

M48Z35AV-70PC1 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:CAPHAT, PLASTIC, DIP-28针数:28
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.37
Is Samacsys:N最长访问时间:70 ns
JESD-30 代码:R-PDIP-T28内存密度:262144 bit
内存集成电路类型:NON-VOLATILE SRAM MODULE内存宽度:8
功能数量:1端子数量:28
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:32KX8
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL认证状态:Not Qualified
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子形式:THROUGH-HOLE端子位置:DUAL
Base Number Matches:1

M48Z35AV-70PC1 数据手册

 浏览型号M48Z35AV-70PC1的Datasheet PDF文件第2页浏览型号M48Z35AV-70PC1的Datasheet PDF文件第3页浏览型号M48Z35AV-70PC1的Datasheet PDF文件第4页浏览型号M48Z35AV-70PC1的Datasheet PDF文件第5页浏览型号M48Z35AV-70PC1的Datasheet PDF文件第6页浏览型号M48Z35AV-70PC1的Datasheet PDF文件第7页 
M48Z35AY  
M48Z35AV  
®
256 Kbit (32Kb x8) ZEROPOWER SRAM  
INTEGRATED ULTRA LOW POWER SRAM,  
SNAPHAT (SH)  
Battery  
POWER-FAIL CONTROL CIRCUIT and  
BATTERY  
READ CYCLE TIME EQUALS WRITE CYCLE  
TIME  
BATTERY LOW FLAG (BOK)  
AUTOMATIC POWER-FAIL CHIP DESELECT  
28  
and WRITE PROTECTION  
1
WRITE PROTECT VOLTAGES  
28  
PCDIP28 (PC)  
Battery CAPHAT  
1
(V  
= Power-fail Deselect Voltage):  
PFD  
– M48Z35AY: 4.20V V  
4.50V  
PFD  
SOH28 (MH)  
– M48Z35AV: 2.7V V  
3.0V  
PFD  
SELF-CONTAINED BATTERY in the CAPHAT  
DIP PACKAGE  
Figure 1. Logic Diagram  
PACKAGING INCLUDES a 28-LEAD SOIC and  
®
SNAPHAT TOP  
(to be Ordered Separately)  
SOIC PACKAGE PROVIDES DIRECT  
CONNECTION for a SNAPHAT TOP which  
CONTAINS the BATTERY and CRYSTAL  
V
CC  
PIN and FUNCTION COMPATIBLE with  
JEDEC STANDARD 32K x8 SRAMs  
15  
8
DESCRIPTION  
The M48Z35AY/35AV ZEROPOWER RAM is a  
®
A0-A14  
DQ0-DQ7  
32 Kbit x8 non-volatile static RAM that integrates  
power-fail deselect circuitry and battery control  
logic on a single die. The monolithic chip is avail-  
able in two special packages to provide a highly in-  
tegrated battery backed-up memory solution.  
W
E
M48Z35AY  
M48Z35AV  
G
Table 1. Signal Names  
A0-A14  
Address Inputs  
Data Inputs / Outputs  
Chip Enable  
DQ0-DQ7  
V
E
SS  
AI02781B  
G
W
Output Enable  
Write Enable  
Supply Voltage  
Ground  
V
CC  
V
SS  
April 2000  
1/16  

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