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M48T513Y-70PM1 PDF预览

M48T513Y-70PM1

更新时间: 2024-11-13 22:09:03
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 计时器或实时时钟微控制器和处理器外围集成电路静态存储器光电二极管双倍数据速率
页数 文件大小 规格书
23页 146K
描述
3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM

M48T513Y-70PM1 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP32,.6针数:36
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.78
外部数据总线宽度:8信息访问方法:PARALLEL, DIRECT ADDRESS
中断能力:YJESD-30 代码:R-PDIP-T36
长度:52.96 mm端子数量:36
计时器数量:最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP32,.6
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:9.52 mm
子类别:Timer or RTC最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
最短时间:SECONDS处于峰值回流温度下的最长时间:NOT SPECIFIED
易失性:NO宽度:15.24 mm
uPs/uCs/外围集成电路类型:TIMER, REAL TIME CLOCKBase Number Matches:1

M48T513Y-70PM1 数据手册

 浏览型号M48T513Y-70PM1的Datasheet PDF文件第2页浏览型号M48T513Y-70PM1的Datasheet PDF文件第3页浏览型号M48T513Y-70PM1的Datasheet PDF文件第4页浏览型号M48T513Y-70PM1的Datasheet PDF文件第5页浏览型号M48T513Y-70PM1的Datasheet PDF文件第6页浏览型号M48T513Y-70PM1的Datasheet PDF文件第7页 
M48T513Y  
M48T513V  
3.3V-5V 4 Mbit (512Kb x8) TIMEKEEPER SRAM  
INTEGRATED ULTRA LOW POWER SRAM,  
REAL TIME CLOCK, POWER-FAIL CONTROL  
CIRCUIT, BATTERY, and CRYSTAL  
YEAR 2000 COMPLIANT  
32  
BCD CODED CENTURY, YEAR, MONTH,  
DAY, DATE, HOURS, MINUTES, and  
SECONDS  
1
PMDIP32 (PM)  
Module  
BATTERY LOW WARNING FLAG  
AUTOMATIC POWER-FAIL CHIP DESELECT  
SNAPHAT (SH)  
Battery  
and WRITE PROTECTION  
TWO WRITE PROTECT VOLTAGES:  
(V  
= Power-fail Deselect Voltage)  
PFD  
– M48T513Y: 4.2V V  
4.5V  
3.0V  
PFD  
PFD  
32  
– M48T513V: 2.7V V  
CONVENTIONAL SRAM OPERATION;  
UNLIMITED WRITE CYCLES  
1
SOFTWARE CONTROLLED CLOCK  
CALIBRATION for HIGH ACCURACY  
APPLICATIONS  
TSOP II 32  
(10 x 20mm)  
SOH44  
Surface Mount Chip Set Solution (CS)  
10 YEARS of DATA RETENTION and CLOCK  
OPERATION in the ABSENCE of POWER  
SELF CONTAINED BATTERY and CRYSTAL  
Figure 1. Logic Diagram  
in DIP PACKAGE  
V
CC  
MICROPROCESSOR POWER-ON RESET  
(Valid even during battery back-up mode)  
19  
8
PROGRAMMABLE ALARM OUTPUT ACTIVE  
in BATTERY BACK-UP MODE  
A0-A18  
DQ0-DQ7  
SURFACE MOUNT CHIP SET PACKAGING  
INCLUDES a 44-PIN SOIC and a 32-LEAD  
TSOP (SNAPHAT TOP TO BE ORDERED  
SEPARATELY)  
W
RST  
M48T513Y  
M48T513V  
E
G
IRQ/FT  
SOIC PACKAGE PROVIDES DIRECT  
CONNECTION for a SNAPHAT TOP WHICH  
CONTAINS the BATTERY and CRYSTAL  
WDI  
RSTIN  
SNAPHAT HOUSING (BATTERY/CRYSTAL)  
IS REPLACEABLE  
V
SS  
AI02308  
June 2000  
1/23  

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