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M48T513YSH PDF预览

M48T513YSH

更新时间: 2024-11-13 22:08:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 静态存储器
页数 文件大小 规格书
23页 146K
描述
3.3V-5V 4 Mbit 512Kb x8 TIMEKEEPER SRAM

M48T513YSH 数据手册

 浏览型号M48T513YSH的Datasheet PDF文件第2页浏览型号M48T513YSH的Datasheet PDF文件第3页浏览型号M48T513YSH的Datasheet PDF文件第4页浏览型号M48T513YSH的Datasheet PDF文件第5页浏览型号M48T513YSH的Datasheet PDF文件第6页浏览型号M48T513YSH的Datasheet PDF文件第7页 
M48T513Y  
M48T513V  
3.3V-5V 4 Mbit (512Kb x8) TIMEKEEPER SRAM  
INTEGRATED ULTRA LOW POWER SRAM,  
REAL TIME CLOCK, POWER-FAIL CONTROL  
CIRCUIT, BATTERY, and CRYSTAL  
YEAR 2000 COMPLIANT  
32  
BCD CODED CENTURY, YEAR, MONTH,  
DAY, DATE, HOURS, MINUTES, and  
SECONDS  
1
PMDIP32 (PM)  
Module  
BATTERY LOW WARNING FLAG  
AUTOMATIC POWER-FAIL CHIP DESELECT  
SNAPHAT (SH)  
Battery  
and WRITE PROTECTION  
TWO WRITE PROTECT VOLTAGES:  
(V  
= Power-fail Deselect Voltage)  
PFD  
– M48T513Y: 4.2V V  
4.5V  
3.0V  
PFD  
PFD  
32  
– M48T513V: 2.7V V  
CONVENTIONAL SRAM OPERATION;  
UNLIMITED WRITE CYCLES  
1
SOFTWARE CONTROLLED CLOCK  
CALIBRATION for HIGH ACCURACY  
APPLICATIONS  
TSOP II 32  
(10 x 20mm)  
SOH44  
Surface Mount Chip Set Solution (CS)  
10 YEARS of DATA RETENTION and CLOCK  
OPERATION in the ABSENCE of POWER  
SELF CONTAINED BATTERY and CRYSTAL  
Figure 1. Logic Diagram  
in DIP PACKAGE  
V
CC  
MICROPROCESSOR POWER-ON RESET  
(Valid even during battery back-up mode)  
19  
8
PROGRAMMABLE ALARM OUTPUT ACTIVE  
in BATTERY BACK-UP MODE  
A0-A18  
DQ0-DQ7  
SURFACE MOUNT CHIP SET PACKAGING  
INCLUDES a 44-PIN SOIC and a 32-LEAD  
TSOP (SNAPHAT TOP TO BE ORDERED  
SEPARATELY)  
W
RST  
M48T513Y  
M48T513V  
E
G
IRQ/FT  
SOIC PACKAGE PROVIDES DIRECT  
CONNECTION for a SNAPHAT TOP WHICH  
CONTAINS the BATTERY and CRYSTAL  
WDI  
RSTIN  
SNAPHAT HOUSING (BATTERY/CRYSTAL)  
IS REPLACEABLE  
V
SS  
AI02308  
June 2000  
1/23  

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