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M28LV64-250XN6 PDF预览

M28LV64-250XN6

更新时间: 2024-09-16 22:51:43
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
18页 128K
描述
64K 8K x 8 LOW VOLTAGE PARALLEL EEPROM with SOFTWARE DATA PROTECTION

M28LV64-250XN6 数据手册

 浏览型号M28LV64-250XN6的Datasheet PDF文件第2页浏览型号M28LV64-250XN6的Datasheet PDF文件第3页浏览型号M28LV64-250XN6的Datasheet PDF文件第4页浏览型号M28LV64-250XN6的Datasheet PDF文件第5页浏览型号M28LV64-250XN6的Datasheet PDF文件第6页浏览型号M28LV64-250XN6的Datasheet PDF文件第7页 
M28LV64  
64K (8K x 8) LOW VOLTAGE PARALLEL EEPROM  
with SOFTWARE DATA PROTECTION  
NOT FOR NEW DESIGN  
FAST ACCESS TIME: 200ns  
SINGLE LOW VOLTAGE OPERATION  
LOW POWER CONSUMPTION  
FAST WRITE CYCLE:  
– 64 Bytes Page Write Operation  
– Byte or Page Write Cycle: 3ms Max  
ENHANCED END OF WRITE DETECTION:  
28  
1
– Ready/BusyOpen Drain Output  
(only on the M28LV64)  
PDIP28 (P)  
PLCC32 (K)  
– Data Polling  
– Toggle Bit  
PAGE LOAD TIMER STATUS BIT  
28  
HIGH RELIABILITYSINGLE POLYSILICON,  
CMOS TECHNOLOGY:  
1
– Endurance>100,000 Erase/Write Cycles  
– Data Retention >40 Years  
SO28 (MS)  
300 mils  
TSOP28 (N)  
8 x13.4mm  
JEDEC APPROVED BYTEWIDE PIN OUT  
SOFTWARE DATA PROTECTION  
The M28LV64 is replaced by the  
M28C64-xxW  
Figure 1. Logic Diagram  
DESCRIPTION  
The M28LV64 is an 8K x 8 low power Parallel  
EEPROM fabricated with SGS-THOMSON pro-  
prietary single polysilicon CMOS technology. The  
device offers fast access time with low power dis-  
sipation and requires a 2.7V to 3.6V power supply.  
V
CC  
13  
8
A0-A12  
DQ0-DQ7  
Table 1. Signal Names  
W
E
M28LV64  
A0 - A12  
Address Input  
DQ0 - DQ7 Data Input / Output  
RB *  
G
W
Write Enable  
Chip Enable  
Output Enable  
Ready / Busy  
Supply Voltage  
Ground  
E
G
V
SS  
RB  
VCC  
VSS  
AI01538B  
Note: * RB function is only available on the M28LV64.  
May 1997  
1/18  
This is information on a product still in production but not recommended for new designs.  

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