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M27V512-100B6 PDF预览

M27V512-100B6

更新时间: 2024-10-29 19:59:43
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 可编程只读存储器OTP只读存储器光电二极管内存集成电路
页数 文件大小 规格书
16页 163K
描述
64KX8 OTPROM, 100ns, PDIP28, 0.600 INCH, PLASTIC, DIP-28

M27V512-100B6 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP28,.6
针数:28Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.92最长访问时间:100 ns
I/O 类型:COMMONJESD-30 代码:R-PDIP-T28
JESD-609代码:e0长度:37.085 mm
内存密度:524288 bit内存集成电路类型:OTP ROM
内存宽度:8功能数量:1
端子数量:28字数:65536 words
字数代码:64000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:64KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP28,.6封装形状:RECTANGULAR
封装形式:IN-LINE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not Qualified座面最大高度:5.08 mm
最大待机电流:0.00001 A子类别:OTP ROMs
最大压摆率:0.01 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:15.24 mmBase Number Matches:1

M27V512-100B6 数据手册

 浏览型号M27V512-100B6的Datasheet PDF文件第2页浏览型号M27V512-100B6的Datasheet PDF文件第3页浏览型号M27V512-100B6的Datasheet PDF文件第4页浏览型号M27V512-100B6的Datasheet PDF文件第5页浏览型号M27V512-100B6的Datasheet PDF文件第6页浏览型号M27V512-100B6的Datasheet PDF文件第7页 
M27V512  
512 Kbit (64Kb x 8) Low Voltage UV EPROM and OTP EPROM  
NOT FOR NEW DESIGN  
M27V512 is replaced by the M27W512  
3V to 3.6V LOW VOLTAGE in READ  
OPERATION  
ACCESS TIME: 100ns  
28  
28  
LOW POWER CONSUMPTION:  
– Active Current 10mA at 5MHz  
1
1
– Standby Current 10µA  
FDIP28W (F)  
PDIP28 (B)  
PROGRAMMING VOLTAGE: 12.75V ± 0.25V  
PROGRAMMING TIME: 100µs/word  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 20h  
– Device Code: 3Dh  
PLCC32 (K)  
TSOP28 (N)  
8 x 13.4 mm  
DESCRIPTION  
The M27V512 is a low voltage 512 Kbit EPROM  
offered in the two ranges UV (ultra violet erase)  
and OTP (one time programmable). It is ideally  
suited for microprocessor systems and is orga-  
nized as 65,536 by 8 bits.  
Figure 1. Logic Diagram  
The M27V512 operates in the read mode with a  
supply voltage as low as 3V. The decrease in op-  
erating power allows either a reduction of the size  
of the battery or an increase in the time between  
battery recharges.  
V
CC  
The FDIP28W (window ceramc frit-seal package)  
has transparent lid which allws the user to ex-  
pose the chip to ultraviolet light to erase the bit pat-  
tern. A new pattern can then be written to the  
device by following the programming procedure.  
16  
8
A0-A15  
Q0-Q7  
For applications where the content is programmed  
only one time and erasure is not required, the  
M27V5is offered in PDIP28, PLCC32 and  
TSOP28 (8 x 13.4 mm) packages.  
E
M27V512  
GV  
PP  
V
SS  
AI00732B  
July 2000  
1/16  
This is information on a product still in production but not recommended for new designs.  

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