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M27V256-90K1TR PDF预览

M27V256-90K1TR

更新时间: 2024-10-27 22:55:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 存储内存集成电路可编程只读存储器OTP只读存储器电动程控只读存储器
页数 文件大小 规格书
15页 105K
描述
256 Kbit 32Kb x 8 Low Voltage UV EPROM and OTP EPROM

M27V256-90K1TR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFJ包装说明:PLASTIC, LCC-32
针数:32Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.92Is Samacsys:N
最长访问时间:90 nsI/O 类型:COMMON
JESD-30 代码:R-PQCC-J32JESD-609代码:e0
长度:13.97 mm内存密度:262144 bit
内存集成电路类型:OTP ROM内存宽度:8
功能数量:1端子数量:32
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:32KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC32,.5X.6
封装形状:RECTANGULAR封装形式:CHIP CARRIER
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V编程电压:3.3 V
认证状态:Not Qualified座面最大高度:3.56 mm
最大待机电流:0.00001 A子类别:OTP ROMs
最大压摆率:0.01 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:11.43 mmBase Number Matches:1

M27V256-90K1TR 数据手册

 浏览型号M27V256-90K1TR的Datasheet PDF文件第2页浏览型号M27V256-90K1TR的Datasheet PDF文件第3页浏览型号M27V256-90K1TR的Datasheet PDF文件第4页浏览型号M27V256-90K1TR的Datasheet PDF文件第5页浏览型号M27V256-90K1TR的Datasheet PDF文件第6页浏览型号M27V256-90K1TR的Datasheet PDF文件第7页 
M27V256  
256 Kbit (32Kb x 8) Low Voltage UV EPROM and OTP EPROM  
LOW VOLTAGE READ OPERATION:  
3V to 3.6V  
FAST ACCESS TIME: 90ns  
LOW POWER CONSUMPTION:  
28  
– Active Current 10mA at 5MHz  
28  
– Standby Current 10µA  
1
1
PROGRAMMING VOLTAGE: 12.75V ± 0.25V  
FDIP28W (F)  
PDIP28 (B)  
PROGRAMMING TIME: 100µs/byte (typical)  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 20h  
– Device Code: 8Dh  
DESCRIPTION  
The M27V256 is a low voltage 256 Kbit EPROM  
offered in the two ranges UV (ultra violet erase)  
and OTP (one time programmable). It is ideally  
suited for microprocessor systems and is orga-  
nized as 32,768 by 8 bits.  
PLCC32 (K)  
TSOP28 (N)  
8 x 13.4mm  
Figure 1. Logic Diagram  
The M27V256 operates in the read mode with a  
supply voltage as low as 3V. The decrease in op-  
erating power allows either a reduction of the size  
of the battery or an increase in the time between  
battery recharges.  
The FDIP28W (window ceramic frit-seal package)  
has a transparent lid which allows the user to ex-  
pose the chip to ultraviolet light to erase the bit pat-  
tern. A new pattern can then be written to the  
device by following the programming procedure.  
V
V
PP  
CC  
15  
8
A0-A14  
Q0-Q7  
Table 1. Signal Names  
E
M27V256  
A0-A14  
Q0-Q7  
E
Address Inputs  
Data Outputs  
Chip Enable  
Output Enable  
Program Supply  
Supply Voltage  
Ground  
G
G
V
SS  
V
V
V
PP  
CC  
SS  
AI01908  
May 1998  
1/15  

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