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M27V102-100K6 PDF预览

M27V102-100K6

更新时间: 2024-10-27 19:46:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 可编程只读存储器OTP只读存储器内存集成电路
页数 文件大小 规格书
15页 157K
描述
64KX16 OTPROM, 100ns, PQCC44, PLASTIC, LCC-44

M27V102-100K6 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:LCC包装说明:PLASTIC, LCC-44
针数:44Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.92最长访问时间:100 ns
I/O 类型:COMMONJESD-30 代码:S-PQCC-J44
JESD-609代码:e0长度:16.5862 mm
内存密度:1048576 bit内存集成电路类型:OTP ROM
内存宽度:16功能数量:1
端子数量:44字数:65536 words
字数代码:64000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:64KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC44,.7SQ封装形状:SQUARE
封装形式:CHIP CARRIER并行/串行:PARALLEL
电源:3.3 V认证状态:Not Qualified
座面最大高度:4.7 mm最大待机电流:0.00002 A
子类别:OTP ROMs最大压摆率:0.015 mA
最大供电电压 (Vsup):3.63 V最小供电电压 (Vsup):2.97 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
宽度:16.5862 mmBase Number Matches:1

M27V102-100K6 数据手册

 浏览型号M27V102-100K6的Datasheet PDF文件第2页浏览型号M27V102-100K6的Datasheet PDF文件第3页浏览型号M27V102-100K6的Datasheet PDF文件第4页浏览型号M27V102-100K6的Datasheet PDF文件第5页浏览型号M27V102-100K6的Datasheet PDF文件第6页浏览型号M27V102-100K6的Datasheet PDF文件第7页 
M27V102  
1 Mbit (64Kb x16) Low Voltage UV EPROM and OTP EPROM  
NOT FOR NEW DESIGN  
M27V102 is replaced by the M27W102  
LOW VOLTAGE READ OPERATION:  
3V to 3.6V  
ACCESS TIME: 90ns  
LOW POWER CONSUMPTION:  
40  
40  
– Active Current 15mA at 5MHz  
– Standby Current 20µA  
1
1
FDIP40W (F)  
PDIP40 (B)  
PROGRAMMING VOLTAGE: 12.75V ± 0.25V  
PROGRAMMING TIME: 100µs/word  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 20h  
– Device Code: 8Ch  
PLCC44 (K)  
TSOP40 (N)  
8 x 20 mm  
DESCRIPTION  
The M27V102 is a low voltage 1 Mbit EPROM of-  
fered in the two ranges UV (ultra violet erase) and  
OTP (one time programmable). It is ideally suited  
for microprocessor systems requiring large data or  
program storage and is organized as 65,536  
words by 16 bits.  
Figure 1. Logic Diagram  
The M27V102 operates in the read mode with a  
supply voltage as low as 3V. The decrease in op-  
erating power allows either a reduction of the size  
of the battery or an increase in the time between  
battery recharges.  
V
V
PP  
CC  
The FDIP40W (window ceramic frit-seal package)  
has a transparent lid which allows the user to ex-  
pose the chip to ultraviolet light to erase the bit pat-  
tern. A new pattern can then be written to the  
device by following the programming procedure.  
16  
16  
A0-A15  
Q0-Q15  
P
E
For application where the content is programmed  
only one time and erasure is not required, the  
M27V102 is offered in PDIP40, PLCC32 and  
TSOP40 (10 x 14 mm) packages.  
M27V102  
G
V
SS  
AI01912  
July 2000  
1/15  
This is information on a product still in production but not recommended for new designs.  

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