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M27V101-90N6TR PDF预览

M27V101-90N6TR

更新时间: 2024-10-26 22:55:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 可编程只读存储器电动程控只读存储器
页数 文件大小 规格书
15页 106K
描述
1 Mbit 128Kb x 8 Low Voltage UV EPROM and OTP EPROM

M27V101-90N6TR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSOP包装说明:8 X 20 MM, PLASTIC, TSOP-32
针数:32Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.91最长访问时间:90 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-G32
JESD-609代码:e0长度:18.4 mm
内存密度:1048576 bit内存集成电路类型:OTP ROM
内存宽度:8功能数量:1
端子数量:32字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:128KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP1
封装等效代码:TSSOP32,.8,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.2 mm最大待机电流:0.00002 A
子类别:OTP ROMs最大压摆率:0.015 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
宽度:8 mmBase Number Matches:1

M27V101-90N6TR 数据手册

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M27V101  
1 Mbit (128Kb x 8) Low Voltage UV EPROM and OTP EPROM  
LOW VOLTAGE READ OPERATION:  
3V to 3.6V  
FAST ACCESS TIME: 90ns  
LOW POWER CONSUMPTION:  
32  
32  
– Active Current 15mA at 5MHz  
– Standby Current 20µA  
1
1
PROGRAMMING VOLTAGE: 12.75V ± 0.25V  
PROGRAMMING TIME: 100µs/byte (typical)  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 20h  
FDIP32W (F)  
PDIP32 (B)  
– Device Code: 05h  
DESCRIPTION  
The M27V101 is a low voltage 1 Mbit EPROM of-  
fered in the two ranges UV (ultra violet erase) and  
OTP (one time programmable). It is ideally suited  
for microprocessor systems requiring large data or  
program storage and is organized as 131,072 by 8  
bits.  
PLCC32 (K)  
TSOP32 (N)  
8 x 20 mm  
Figure 1. Logic Diagram  
The M27V101 operates in the read mode with a  
supply voltage as low as 3V. The decrease in op-  
erating power allows either a reduction of the size  
of the battery or an increase in the time between  
battery recharges.  
V
V
PP  
CC  
The FDIP32W (window ceramic frit-seal package)  
has a transparent lid which allow the user to ex-  
pose the chip to ultraviolet light to erase the bit pat-  
tern.  
17  
8
A0-A16  
Q0-Q7  
Table 1. Signal Names  
P
E
A0-A16  
Address Inputs  
Data Outputs  
Chip Enable  
Output Enable  
Program  
M27V101  
Q0-Q7  
E
G
P
G
V
SS  
V
Program Supply  
Supply Voltage  
Ground  
PP  
AI00660B  
V
CC  
V
SS  
May 1998  
1/15  

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