Datasheet > M12L128168A-7BVAG2N

M12L128168A-7BVAG2N

更新时间： 2023-05-15 00:00:00

品牌	Logo	应用领域
晶豪 - ESMT		动态存储器
页数	文件大小	规格书
46页	687K
描述
Synchronous DRAM, 8MX16, 5.4ns, CMOS, PBGA54, 8 X 8 MM, 1 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, BGA-54

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ESMT

M12L128168A (2N)

Automotive Grade

AC OPERATING TEST CONDITIONS (V_DD= 3.3V ± 0.3V)

Parameter

Input levels (Vih/Vil)

Value

Unit

2.4/0.4

1.4

Input timing measurement reference level

Input rise and fall-time

tr/tf = 1/1

1.4

Output timing measurement reference level

Output load condition

See Fig. 2

Vtt = 1.4V

3.3V

⁵⁰Ω

1200

Ω

VOH (DC) =2.4V , IOH = -2 mA

VOL (DC) =0.4V , IOL = 2 mA

Output

^{Z0 =50}Ω

50pF

⁸⁷⁰Ω

(Fig. 1) DC Output Load Circuit

(Fig. 2) AC Output Load Circuit

OPERATING AC PARAMETER

(AC operating conditions unless otherwise noted)

Version

Parameter

Symbol

Unit

Note

-5

-6

-7

Row active to row active delay

t_RRD(min)

_RCD(min)

RAS to CAS delay

Row precharge time

t_RP(min)

t_RAS(min)

Row active time

_RAS(max)

t_RC(min)

_RFC(min)

100

@ Operating

Row cycle time

@ Auto refresh

1,5

Last data in to col. address delay

t_CDL(min)

t_RDL(min)

t_BDL(min)

CLK

Last data in to row precharge

Last data in to burst stop

_REF(max)

Refresh period (4,096 rows) for T_A≤ 85℃

Refresh period (4,096 rows) for T_A＞85℃ (VA grade only)

Col. address to col. address delay

t_REF(max)

t_CCD(min)

CLK

CAS latency = 3

CAS latency = 2

Number of valid Output data

Note: 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and then

rounding off to the next higher integer.

2. Minimum delay is required to complete write.

3. All parts allow every cycle column address change.

4. In case of row precharge interrupt, auto precharge and read burst stop.

5. A new command may be given t_RFCafter self refresh exit.

6. A maximum of eight consecutive AUTO REFRESH commands (with t_RFC(min)) can be posted to any given SDRAM, and

the maximum absolute interval between any AUTO REFRESH command and the next AUTO REFRESH command is

8x15.6μ s (8 x 3.9μs for VA grade with T_A＞85℃).

Elite Semiconductor Memory Technology Inc.

Publication Date: Jun. 2012

Revision: 1.1 6/46

1...3 4 567 8 9...46

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