LTC2636
OPERATION
POSITIVE
FSE
V
= V
CC
REF
V
= V
CC
REF
OUTPUT
VOLTAGE
OUTPUT
VOLTAGE
INPUT CODE
2636 F04
(c)
OUTPUT
VOLTAGE
0V
0
2,048
4,095
INPUT CODE
(a)
0V
NEGATIVE
OFFSET
INPUT CODE
(b)
Figure 4. Effects of Rail-to-Rail Operation On a DAC Transfer Curve (Shown for 12 Bits).
(a) Overall Transfer Function
(b) Effect of Negative Offset for Codes Near Zero
(c) Effect of Positive Full-Scale Error for Codes Near Full-Scale
Rail-to-Rail Output Considerations
the LTC2636 GND pin to the ground plane should be as
low as possible. Resistance here will add directly to the
effective DC output impedance of the device (typically
0.1Ω). Note that the LTC2636 is no more susceptible to
this effect than any other parts of this type; on the con-
trary, it allows layout-based performance improvements
to shine rather than limiting attainable performance with
excessive internal resistance.
In any rail-to-rail voltage output device, the output is lim-
ited to voltages within the supply range.
SincetheanalogoutputoftheDACcannotgobelowground,
it may limit for the lowest codes as shown in Figure 4b.
Similarly, limiting can occur near full-scale when the REF
pin is tied to V . If V = V and the DAC full-scale error
CC
REF
CC
(FSE) is positive, the output for the highest codes limits
Another technique for minimizing errors is to use a sepa-
rate power ground return trace on another board layer.
The trace should run between the point where the power
supply is connected to the board and the DAC ground pin.
Thus the DAC ground pin becomes the common point for
analog ground, digital ground, and power ground. When
the LTC2636 is sinking large currents, this current flows
out the ground pin and directly to the power ground trace
without affecting the analog ground plane voltage.
at V , as shown in Figure 4c. No full-scale limiting can
CC
occur if V is less than V –FSE.
REF
CC
Offset and linearity are defined and tested over the region
of the DAC transfer function where no output limiting can
occur.
Board Layout
ThePCboardshouldhaveseparateareasfortheanalogand
digital sections of the circuit. A single, solid ground plane
should be used, with analog and digital signals carefully
routed over separate areas of the plane. This keeps digital
signals away from sensitive analog signals and minimizes
the interaction between digital ground currents and the
analog section of the ground plane. The resistance from
It is sometimes necessary to interrupt the ground plane
to confine digital ground currents to the digital portion of
the plane. When doing this, make the gap in the plane only
as long as it needs to be to serve its purpose and ensure
that no traces cross over the gap.
2636f
21