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LTC2251_15 PDF预览

LTC2251_15

更新时间: 2024-09-14 01:15:51
品牌 Logo 应用领域
凌特 - Linear /
页数 文件大小 规格书
24页 602K
描述
10-Bit, 125/105Msps Low Noise 3V ADCs

LTC2251_15 数据手册

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LTC2251/LTC2250  
10-Bit, 125/105Msps  
Low Noise 3V ADCs  
U
FEATURES  
DESCRIPTIO  
The LTC®2251/LTC2250 are 10-bit 125Msps/105Msps,  
low noise 3V A/D converters designed for digitizing high  
frequency, wide dynamic range signals. The LTC2251/  
LTC2250 are perfect for demanding imaging and commu-  
nications applications with AC performance that includes  
61.6dB SNR and 85dB SFDR for signals at the Nyquist  
frequency.  
Sample Rate: 125Msps/105Msps  
Single 3V Supply (2.85V to 3.4V)  
Low Power: 395mW/320mW  
61.6dB SNR  
85dB SFDR  
No Missing Codes  
Flexible Input: 1VP-P to 2VP-P Range  
640MHz Full Power Bandwidth S/H  
DC specs include ±0.1LSB INL (typ), ±0.05LSB DNL (typ)  
and ±0.6LSB INL, ±0.6LSB DNL over temperature. The  
transition noise is a low 0.08LSBRMS  
Clock Duty Cycle Stabilizer  
Shutdown and Nap Modes  
.
Pin Compatible Family:  
A single 3V supply allows low power operation. A separate  
output supply allows the outputs to drive 0.5V to 3.3V  
logic.  
125Msps: LTC2251 (10-Bit), LTC2253 (12-Bit)  
105Msps: LTC2250 (10-Bit), LTC2252 (12-Bit)  
80Msps: LTC2239 (10-Bit), LTC2229 (12-Bit)  
65Msps: LTC2238 (10-Bit), LTC2228 (12-Bit)  
40Msps: LTC2237 (10-Bit), LTC2227 (12-Bit)  
25Msps: LTC2236 (10-Bit), LTC2226 (12-Bit)  
Asingle-endedCLKinputcontrolsconverteroperation.An  
optional clock duty cycle stabilizer allows high perfor-  
mance at full speed for a wide range of clock duty cycles.  
32-Pin (5mm × 5mm) QFN Package  
, LTC and LT are registered trademarks of Linear Technology Corporation.  
All other trademarks are the property of their respective owners.  
U
APPLICATIO S  
Wireless and Wired Broadband Communication  
Imaging Systems  
Ultrasound  
Spectral Analysis  
Portable Instrumentation  
U
TYPICAL APPLICATIO  
LTC2251: SNR vs Input Frequency,  
–1dB, 2V Range, 125Msps  
REFH  
REFL  
FLEXIBLE  
REFERENCE  
65  
64  
OV  
DD  
63  
62  
61  
60  
59  
58  
57  
56  
55  
D9  
D0  
+
10-BIT  
PIPELINED  
ADC CORE  
CORRECTION  
LOGIC  
ANALOG  
INPUT  
OUTPUT  
DRIVERS  
INPUT  
S/H  
OGND  
CLOCK/DUTY  
CYCLE  
CONTROL  
0
100 150 200 250 300 350  
50  
22510 TA01  
22510 G09  
INPUT FREQUENCY (MHz)  
CLK  
22510fa  
1

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