Datasheet > LS7055

LS7055

更新时间： 2024-11-27 12:48:15

品牌	Logo	应用领域
LSI		逻辑集成电路光电二极管驱动计算机
页数	文件大小	规格书
6页	89K
描述
6 DECADE PREDETERMINING UP/DOWN COUNTER

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中文翻译

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技术参数
数据手册

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LS7055 技术参数

是否Rohs认证：	不符合	生命周期：	Contact Manufacturer
包装说明：	DIP, DIP40(UNSPEC)	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.85
Is Samacsys：	N	JESD-30 代码：	R-PDIP-T40
JESD-609代码：	e0	负载/预设输入：	YES
逻辑集成电路类型：	DISPLAY DRIVER COUNTER	端子数量：	40
最高工作温度：	70 °C	最低工作温度：	-25 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	DIP
封装等效代码：	DIP40(UNSPEC)	封装形状：	RECTANGULAR
封装形式：	IN-LINE	电源：	5/15 V
认证状态：	Not Qualified	子类别：	Counters
表面贴装：	NO	技术：	MOS
温度等级：	OTHER	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	THROUGH-HOLE	端子位置：	DUAL
Base Number Matches：	1

LS7055 数据手册

LS7055

LSI/CSI

LS7056

_®L

LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (631) 271-0400 FAX (631) 271-0405

A3800

6 DECADE PREDETERMINING UP/DOWN COUNTER

January 2003

FEATURES:

PIN ASSIGNMENT - TOP VIEW

• +4.75V to +15V (Vss - VDD)

• Preset, Presignal and Mainsignal Store

• DC to 250kHz Count Frequency

• Fully Synchronous Operation

Three Comparators with Output Flags

Automatic or Manual Preset/Reset Control

• Thumbwheel Interface for Storage Selects

• Prescale on Count Input Selectable

• Count Inhibit

• Up/Down Control

• Scan Rate up to 150kHz

• Scan Oscillator has Override Capability

• Blanking Override for Decimal Point Operaton

• Multiplexed 7 Segment and BCD Data Output

• Output latches

COUNT INPUT

COUNT INHIBIT INPUT

UP/DOWN INPUT

DIVIDE CONTROL INPUT 1

ZERO DETECT OUTPUT

DATA TRANSFER INPUT

DIVIDE CONTROL INPUT 2

RESET INPUT

PRESIGNAL OUTPUT

INHIBIT INTERNAL RESET INPUT

INHIBIT INTERNAL PRESET INPUT

BCD

DATA

OUTPUTS

PRESET INPUT

VDD (-V)

LS7055

MAIN SIGNAL OUTPUT

BLANKING OVERRIDE

BCD

DATA

INPUTS

B2 12

B8 13

• Reset

• Hysteresis on Count Input

• CMOS Type Noise Immunity on all other inputs

• LS7055, LS7056 (DIP) - See Figure 1

SEGMENT

OUTPUTS

VSS (+V)

SELECT STORAGE INPUT 1

SELECT STORAGE INPUT 2

DESCRIPTION:

The LS7055/LS7056 is a MOS synchronous 6 decade Up/Down

counter. The circuit includes storages and comparators, zero de-

tect, automatic presetting and resetting, output latches, multi-

plexed output BCD and seven segment data. Thumbwheel

switches can be used to provide BCD data to the storage net-

works in the circuit.

LSD 17

SCAN OSCILLATOR INPUT

LSD+1

LSD+2 19

DIGIT

SELECT

OUTPUTS

DIGIT

MSD

SELECT

OUTPUTS

LSD+4

LSD+3

FIGURE 1

COUNT (Pin 40)

Counter operates at speeds up to 250kHz and advances on the

positive edge of the input count pulse.

* OPTIONAL CHOICE-LAMP TEST ( SPECIFY LS7 0 5 6 )

INHIBIT INTERNAL RESET (Pin 5)

A high input prevents the automatic reset of the counter to zero when

in the up mode and when the counter reaches the number in the

main signal store.

UP/DOWN (Pin 39)

Counter operates in up or down mode. A high input causes the

counter to operate in the up mode while a low input causes it to

operate in the down mode.

PRESET (Pin 7)

A high level presets the BCD counter to the number set in the preset

store. A low input allows counter operation.

COUNT INHIBIT (Pin 1)

A high input inhibits counting and the counter remains at its last

count. A low input enables counting.

INHIBIT INTERNAL PRESET (Pin 6)

A high input prevents the automatic preset of the counter to the

number set in preset store when in the down mode and the counter

reaches zero.

DATA TRANSFER INPUT (Pin 37)

A high input allows the seven segment display and BCD data to

follow the count (the internal latches become transparent). A low

input prevents updating of the latches as the count advances and

the seven segment display and BCD data outputs remain fixed.

SELECT STORAGE OF DATA INPUTS (Pins 15, 16)

Two inputs which allow BCD data to be stored in either the preset,

presignal or main signal store. The proper method for loading the

stores is depicted in Figure 4.

RESET (Pin 4)

A high input resets and holds all counter stages at zero. A low

input allows counter operation.

PIN 15

PIN16

STORAGE

No Selection

Presignal

Main Signal

Preset

7055-012703-1

12 3 4 5 6

中文翻译

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与LS7055相关器件

型号	品牌	获取价格	描述	数据表
LS7056	LSI	获取价格	6 DECADE PREDETERMINING UP/DOWN COUNTER
LS7060	LSI	获取价格	32 BIT/DUAL 16 BIT BINARY UP COUNTER WITH BYTE MULTIPLEXED THREE-STATE OUTPUTS
LS7060_03	LSI	获取价格	32 BIT/DUAL 16 BIT BINARY UP COUNTER WITH BYTE MULTIPLEXED THREE-STATE OUTPUTS
LS7060C	LSI	获取价格	32 BIT BINARY UP COUNTER WITH BYTE MULTIPLEXED THREE-STATE OUTPUTS
LS7061	LSI	获取价格	32 BIT/DUAL 16 BIT BINARY UP COUNTER WITH BYTE MULTIPLEXED THREE-STATE OUTPUTS
LS7061C	LSI	获取价格	32 BIT BINARY UP COUNTER WITH BYTE MULTIPLEXED THREE-STATE OUTPUTS
LS7062	LSI	获取价格	32 BIT/DUAL 16 BIT BINARY UP COUNTER WITH BYTE MULTIPLEXED THREE-STATE OUTPUTS
LS7063	LSI	获取价格	32 BIT/DUAL 16 BIT BINARY UP COUNTER WITH BYTE MULTIPLEXED THREE-STATE OUTPUTS
LS7066	ETC	获取价格	ENCODER INTERFACE\|MOS\|DIP\|20PIN\|PLASTIC
LS7080	ETC	获取价格	Interface IC

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