Datasheet > LS7083

LS7083

更新时间： 2024-11-23 22:31:03

品牌	Logo	应用领域
LSI		转换器时钟
页数	文件大小	规格书
4页	42K
描述
QUADRATURE CLOCK CONVERTER

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LS7083 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	DIP	包装说明：	DIP,
针数：	8	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.74
商用集成电路类型：	CONSUMER CIRCUIT	JESD-30 代码：	R-PDIP-T8
JESD-609代码：	e0	长度：	9.58 mm
功能数量：	1	端子数量：	8
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	DIP
封装形状：	RECTANGULAR	封装形式：	IN-LINE
最大供电电压 (Vsup)：	10 V	最小供电电压 (Vsup)：	4.5 V
表面贴装：	NO	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	宽度：	7.62 mm
Base Number Matches：	1

LS7083 数据手册

LS7083/7084

LSI/CSI

_®L

LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (631) 271-0400 FAX (631) 271-0405

A3800

October 2000

QUADRATURE CLOCK CONVERTER

FEATURES:

• x1 and x4 mode selection

PIN AS S IGNMENT - TOP VIEW

• Up to 16 MHz output clock frequency

• Programmable output clock pulse width

• On-chip filtering of inputs for optical or

magnetic encoder applications.

• TTL and CMOS compatible I/Os

• +4.5V to +10.0V operation (VDD-VSS)

• LS7083, LS7084 (DIP)

RBIAS

UPCK

VDD(+V)

DNCK

x4/x1

VSS(-V)

LS7083-S, LS7084-S (SOIC) - See Figure 1

DESCRIPTION:

The LS7083 and LS7084 are monolithic CMOS silicon gate

quadrature clock converters. Quadrature clocks derived

from optical or magnetic encoders, when applied to the A

and B inputs of the LS7083/LS7084, are converted to strings

of Up Clocks and Down Clocks (LS7083) or to a Clock and

an Up/Down direction control (LS7084). These outputs can

be interfaced directly with standard Up/Down counters for di-

CLK

RBIAS

VDD(+V)

UP/DN

x4/x1

VSS(-V)

rection and position sensing of the encoder.

INPUT/OUTPUT DESCRIPTION:

RBIAS (Pin 1)

Input for external component connection. A resistor con-

nected between this input and VSS adjusts the output clock

pulse width (Tow). For proper operation, the output clock

pulse width must be less than or equal to the A,B pulse

separation (TOW£TPS).

FIGURE 1

LS7083 - DNCK (Pin 7)

In LS7083, this is the DOWN Clock Output. This output con-

sists of low-going pulses generated when A input lags the B

input.

VDD (Pin 2)

Supply Voltage positive terminal.

LS7084 - UP/DN (Pin 7)

In LS7084, this is the count direction indication output.

When A input leads the B input, the UP/DN output goes high

indicating that the count direction is UP. When A input lags

the B input, UP/DN output goes low, indicating that the count

direction is DOWN.

VSS (Pin 3)

Supply Voltage negative terminal.

A (Pin 4)

Quadrature Clock Input A. This input has a filter circuit to

validate input logic level and eliminate encoder dither.

LS7083 - UPCK (Pin 8)

In LS7083, this is the UP Clock output. This output consists

of low-going pulses generated when A input leads the B in-

put.

B (Pin 5)

Quadrature Clock Input B. This input has a filter circuit

identical to input A.

LS7084 - CLK (Pin 8)

x4/x1 (Pin 6)

In LS7084, this is the combined UP Clock and DOWN Clock

output. The count direction at any instant is indicated by the

UP/DN output (Pin 7).

This input selects between x1 and x4 modes of operation.

A high-level selects x4 mode and a low-level selects the x1

mode. In x4 mode, an output pulse is generated for every

transition at either A or B input. In x1 mode, an output

pulse is generated in one combined A/B input cycle.

(See Figure 2.)

NOTE: For the LS7084, the timing of CLK and UP/DN re-

quires that the counter interfacing with LS7084 counts on the

rising edge of the CLK pulses.

7083/84-100600-1

12 3 4

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与LS7083相关器件

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LS7083N	LSI	获取价格	QUADRATURE CLOCK CONVERTER
LS7083NS-14	LSI	获取价格	QUADRATURE CLOCK CONVERTER
LS7083-SOIC	ETC	获取价格	ENCODER INTERFACE\|CMOS\|SOP\|14PIN\|PLASTIC
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LS7084N	LSI	获取价格	QUADRATURE CLOCK CONVERTER
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LS70C2D-T	CITIZEN	获取价格	Switch operating force
LS70C4D	CITIZEN	获取价格	Switch operating force
LS70C4D-T	CITIZEN	获取价格	Switch operating force

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