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LMX3305_09

更新时间: 2024-11-25 05:42:27
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描述
Triple Phase Locked Loop for RF Personal Communications

LMX3305_09 数据手册

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OBSOLETE  
April 28, 2009  
LMX3305  
Triple Phase Locked Loop for RF Personal  
Communications  
General Description  
Features  
The LMX3305 contains three Phase Locked Loops (PLL) on  
a single chip. It has a RF PLL, an IF Rx PLL and an IF Tx PLL  
for CDMA applications. The RF fractional-N PLL uses a  
16/17/20/21 quadruple modulus prescaler for PCS applica-  
tion and a 8/9/12/13 quadruple modulus prescaler for cellular  
application. Both quadruple modulus prescalers offer modulo  
1 through 16 fractional compensation circuitry. The RF frac-  
tional-N PLL can be programmed to operate from 800 MHz to  
1400MHz in cellular band and 1200MHz to 2300 MHz in PCS  
band. The IF Rx PLL and the IF Tx PLL are integer-N fre-  
quency synthesizers that operate from 45 MHz to 600 MHz  
with 8/9 dual modulus prescalers. Serial data is transferred  
into the LMX3305 via a microwire interface (Clock, Data, &  
LE).  
Three PLLs integrated on a single chip  
RF PLL fractional-N counter  
16/17/20/21 RF quadruple modulus prescaler for PCS  
application  
8/9/12/13 RF quadruple modulus prescaler for cellular  
application  
2.7V to 3.6V option  
Low current cmon: I= 9 mA (typ) at 3.0V  
Programmle or al wer down mode: ICC = 10 µA  
(typ) at 3
RF PLck feature with timeout counter  
Digital lock de
Mowire Interfacwith data preset  
pin SP package  
The RF PLL provides a fastlock feature allowing the loop  
bandwidth to be increased by 3X during initial lock-on.  
The supply voltage of the LMX3305 ranges from 2.7V to 3.6V.  
It typically consumes 9 mA of supply current and is packaged  
in a 24-pin CSP package.  
Applions  
CDMA Cellular telephone systems  
Block Diagram  
10136101  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 2009 National Semiconductor Corporation  
101361  
www.national.com  
101361 Version 3 Revision 5 Print Date/Time: 2009/04/28 20:23:25  

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