LMK03002
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SNAS414E –AUGUST 2007–REVISED APRIL 2013
LMK03002 /LMK03002C Precision Clock Conditioner with Integrated VCO
Check for Samples: LMK03002
1
FEATURES
TARGET APPLICATIONS
2
•
Integrated VCO with Very Low Phase Noise
Floor
•
•
•
•
•
•
Data Converter Clocking
Networking, SONET/SDH, DSLAM
Wireless Infrastructure
Medical
•
Integrated Integer-N PLL with Outstanding
Normalized Phase Noise Contribution of
-224 dBc/Hz
Test and Measurement
Military / Aerospace
•
•
Clock Generator Performance (10 Hz - 20 MHz)
–
LMK03002C: 200 fs RMS Jitter
Jitter Cleaner Performance Grade (12 kHz to
20 MHz)
DESCRIPTION
The
LMK03002/LMK03002C
precision
clock
conditioners combine the functions of jitter
cleaning/reconditioning, multiplication, and distribution
of a reference clock. The devices integrate a Voltage
Controlled Oscillator (VCO), a high performance
Integer-N Phase Locked Loop (PLL), a partially
integrated loop filter, and four LVPECL clock output
distribution blocks.
–
–
LMK03002: 800 fs RMS Jitter
LMK03002C: 400 fs RMS Jitter
•
•
VCO Frequency: 1566 to 1724 MHz
Clock Output Frequency Range of 1 to 862
MHz
•
•
•
4 LVPECL Clock Outputs
The VCO output is optionally accessible on the Fout
port. Internally, the VCO output goes through a VCO
Divider to feed the various clock distribution blocks.
Partially Integrated Loop Filter
Dedicated Divider and Delay Blocks on Each
Clock Output
Each
clock
distribution
block
includes
a
•
•
•
Pin Compatible Family of Clocking Devices
3.15 to 3.45 V Operation
programmable divider,
a
phase synchronization
circuit, a programmable delay, a clock output mux,
and an LVPECL output buffer. This allows multiple
integer-related and phase-adjusted copies of the
reference to be distributed to four system
components.
Package: 48 Pin WQFN (7.0 x 7.0 x 0.8 mm)
The clock conditioners come in a 48-pin WQFN
package and are footprint compatible with other
clocking devices in the same family.
CLKout0
Recovered
Serializer/
Deserializer
—dirty“ clock or
clean clock
LMK0300xx
CLKout1
CLKout2
CLKout3
Precision Clock
Conditioner
OSCin
LMX2531
PLL+VCO
FPGA
Fout
> 1 Gsps
Multiple —clean“ clocks at
different frequencies
DAC
ADC
Figure 1. System Diagram
1
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2
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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