PRELIMINARY
April 2006
LMH0030
SMPTE 292M/259M Digital Video Serializer with Video
and Ancillary Data FIFOs and Integrated Cable Driver
The LMH0030’s internal circuitry is powered from +2.5V and
the I/O circuitry from a +3.3V supply. Power dissipation is
General Description
The LMH0030 SMPTE 292M/259M Digital Video Serializer
typically 430mW at 1.485 Gbps including two 75Ω AC-
with Ancillary Data FIFO and Integrated Cable Driver is a
coupled and back-matched output loads. The device is pack-
monolithic integrated circuit that encodes, serializes and
aged in a 64-pin TQFP.
transmits bit-parallel digital video data conforming to SMPTE
125M and 267M standard definition, 10-bit wide component
video and SMPTE 260M, 274M, 295M and 296M high-
definition, 20-bit wide component video standards. The
LMH0030 operates at SMPTE 259M serial data rates of
270 Mbps, 360 Mbps, the SMPTE 344M serial data rate of
540 Mbps; and the SMPTE 292M serial data rates of 1483.5
and 1.485 Gbps. The serial data clock frequency is internally
generated and requires no external frequency setting, trim-
ming or filtering components.
Features
n SDTV/HDTV serial digital video standard compliant
n Supports 270 Mbps, 360 Mbps, 540 Mbps, 1.4835Gbps
and 1.485 Gbps SDV data rates with auto-detection
n Low output jitter: 125ps max, 85ps typical
n Low power: typically 430mW
n No external serial data rate setting or VCO filtering
components required*
The LMH0030 performs functions which include: parallel-to-
serial data conversion, SMPTE standard data encoding,
NRZ to NRZI data format conversion, serial data clock gen-
eration and encoding with the serial data, automatic video
rate and format detection, ancillary data packet manage-
ment and insertion, and serial data output driving. The
LMH0030 has circuitry for automatic EDH/CRC character
and flag generation and insertion per SMPTE RP-165 (stan-
dard definition) or SMPTE 292M (high definition). Optional
LSB dithering is implemented which prevents pathological
pattern generation. Unique to the LMH0030 are its video and
ancillary data FIFOs. The video FIFO allows the video data
to be delayed from 0 to 4 parallel data clock periods for video
timing purposes. The ancillary data port and on-chip FIFO
and control circuitry store and insert ancillary flags, data
packets and checksums into the ancillary data space. The
LMH0030 also has an exclusive built-in self-test (BIST) and
video test pattern generator (TPG) with SD and HD compo-
nent video test patterns: reference black, PLL and EQ patho-
logicals and color bars in 4:3 and 16:9 raster formats for
NTSC and PAL standards*. The color bar patterns feature
optional bandwidth limiting coding in the chroma and luma
transitions.
<
n Fast PLL lock time: 150µs typical at 1.485 Gbps
n Adjustable depth video FIFO for timing alignment
n Built-in self-test (BIST) and video test pattern generator
(TPG)*
n Automatic EDH/CRC word and flag generation and
insertion
n On-chip ancillary data FIFO and insertion control
circuitry
n Flexible control and configuration I/O port
n LVCMOS compatible data and control inputs and
outputs
n 75Ω ECL-compatible, differential, serial cable-driver
outputs
n 3.3V I/O power supply and 2.5V logic power supply
operation
n 64-pin TQFP package
* Patent applications made or pending.
Applications
n SDTV/HDTV parallel-to-serial digital video interfaces for:
— Video cameras
— VTRs
— Telecines
The LMH0030 has a unique multi-function I/O port for imme-
diate access to control and configuration settings. This port
may be programmed to provide external access to control
functions and indicators as inputs and outputs. The designer
can thus customize the LMH0030 to fit the desired applica-
tion. At power-up or after a reset command, the LMH0030 is
auto-configured to a default operating condition. Separate
power pins for the output driver, PLL and the serializer
improve power supply rejection, output jitter and noise per-
formance.
— Digital video routers and switchers
— Digital video processing and editing equipment
— Video test pattern generators and digital video test
equipment
— Video signal generators
Order Number LMH0030VS
64-Pin TQFP
NS Package Number VEC-64A
© 2006 National Semiconductor Corporation
DS201803
www.national.com
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