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LMH0031 PDF预览

LMH0031

更新时间: 2023-09-03 20:34:03
品牌 Logo 应用领域
德州仪器 - TI 先进先出芯片解码器
页数 文件大小 规格书
40页 508K
描述
具有视频和辅助数据 FIFO 的数字视频解串器/解码器

LMH0031 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:QFP, TQFP64,.47SQReach Compliance Code:unknown
风险等级:5.92商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:S-PQFP-G64JESD-609代码:e0
端子数量:64最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:TQFP64,.47SQ
封装形状:SQUARE封装形式:FLATPACK
电源:2.5,3.3 V认证状态:Not Qualified
子类别:Other Consumer ICs最大压摆率:340 mA
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUADBase Number Matches:1

LMH0031 数据手册

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LMH0031  
www.ti.com  
SNLS218A JANUARY 2006REVISED APRIL 2013  
LMH0031 SMPTE 292M/259M Digital Video Deserializer / Descrambler with Video  
and Ancillary Data FIFOs  
Check for Samples: LMH0031  
1
FEATURES  
APPLICATIONS  
2
SDTV/HDTV Serial Digital Video Standard  
Compliant  
SDTV/HDTV Serial-to-Parallel Digital Video  
Interfaces for:  
Supports 270 Mbps, 360 Mbps, 540 Mbps,  
1.483 Gbps and 1.485 Gbps Serial Video Data  
Rates with Auto-Detection  
Video Editing Equipment  
VTRs  
Standards Converters  
Digital Video Routers and Switchers  
LSB De-Dithering Option  
Uses Low-Cost 27MHz Crystal or Clock  
Oscillator Reference  
Digital Video Processing and Editing  
Equipment  
Fast VCO Lock Time: < 500 µs at 1.485 Gbps  
Video Test Pattern Generators and Digital  
Video Test Equipment  
Built-in Self-Test (BIST) and Video Test Pattern  
Generator (TPG)  
Video Signal Generators  
(1)  
Patent Applications Made or Pending  
DESCRIPTION  
Automatic EDH/CRC Word and Flag  
Processing  
The LMH0031 SMPTE 292M / 259M Digital Video  
Deserializer/Descrambler with Video and Ancillary  
Data FIFOs is a monolithic integrated circuit that  
deserializes and decodes SMPTE 292M, 1.485Gbps  
(or 1.483Gbps) serial component video data, to 20-bit  
parallel data with a synchronized parallel word-rate  
clock. It also deserializes and decodes SMPTE 259M,  
270Mbps, 360Mbps and SMPTE 344M (proposed)  
540Mbps serial component video data, to 10-bit  
parallel data. Functions performed by the LMH0031  
include: clock/data recovery from the serial data,  
serial-to-parallel data conversion, SMPTE standard  
data decoding, NRZI-to-NRZ conversion, parallel data  
clock generation, word framing, CRC and EDH data  
checking and handling, Ancillary Data extraction and  
automatic video format determination. The parallel  
video output features a variable-depth FIFO which  
can be adjusted to delay the output data up to 4  
parallel data clock periods. Ancillary Data may be  
selectively extracted from the parallel data through  
the use of masking and control bits in the  
configuration and control registers and stored in the  
on-chip FIFO. Reverse LSB dithering is also  
implemented.  
Ancillary Data FIFO with Extensive Packet  
Handling Options  
Adjustable, 4-Deep Parallel Output Video Data  
FIFO  
Flexible Control and Configuration I/O Port  
LVCMOS Compatible Control Inputs and Clock  
and Data Outputs  
LVDS and ECL-Compatible, Differential, Serial  
Inputs  
3.3V I/O Power Supply and 2.5V Logic Power  
Supply Operation  
Low Power: Typically 850mW  
64-Pin TQFP Package  
Commercial Temperature Range 0°C to +70°C  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2006–2013, Texas Instruments Incorporated  

LMH0031 替代型号

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LMH0030 TI

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