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LMC6022IN PDF预览

LMC6022IN

更新时间： 2024-01-01 15:13:55
品牌 Logo 应用领域
美国国家半导体 - NSC 运算放大器光电二极管
页数 文件大小 规格书
16页 342K
描述
Low Power CMOS Dual Operational Amplifier

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LMC6022IN 技术参数

生命周期：Transferred零件包装代码：WAFER
包装说明：DIE, WAFERReach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.33.00.01
风险等级：5.55放大器类型：OPERATIONAL AMPLIFIER
架构：VOLTAGE-FEEDBACK标称共模抑制比：83 dB
频率补偿：YES最大输入失调电压：9000 µV
JESD-30 代码：X-XUUC-N低-偏置：YES
低-失调：NO微功率：YES
负供电电压上限：标称负供电电压 (Vsup)：
功能数量：2最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：DIE封装等效代码：WAFER
封装形状：UNSPECIFIED封装形式：UNCASED CHIP
电源：5/15 V认证状态：Not Qualified
最小摆率：0.03 V/us标称压摆率：0.11 V/us
子类别：Operational Amplifier最大压摆率：0.165 mA
供电电压上限：16 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：NO LEAD
端子位置：UPPER标称均一增益带宽：350 kHz
最小电压增益：20000Base Number Matches：1

LMC6022IN 数据手册

 浏览型号LMC6022IN的Datasheet PDF文件第4页浏览型号LMC6022IN的Datasheet PDF文件第5页浏览型号LMC6022IN的Datasheet PDF文件第6页浏览型号LMC6022IN的Datasheet PDF文件第8页浏览型号LMC6022IN的Datasheet PDF文件第9页浏览型号LMC6022IN的Datasheet PDF文件第10页 
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Typical Performance Characteristics VS  
7.5V, TA 25˚C unless otherwise specified (Continued)  
Non-Inverting Small  
Signal Pulse Response  
Inverting Large-Signal  
Pulse Response  
Inverting Small-Signal  
Pulse Response  
=
(AV +1)  
DS011236-46  
DS011236-47  
DS011236-45  
Stability vs Capacitive Load  
Stability vs Capacitive Load  
DS011236-4  
DS011236-5  
Note: Avoid resistive loads of less than 500Ω, as they may cause  
instability.  
Application Hints  
AMPLIFIER TOPOLOGY  
The topology chosen for the LMC6022 is unconventional  
(compared to general-purpose op amps) in that the tradi-  
tional unity-gain buffer output stage is not used; instead, the  
output is taken directly from the output of the integrator, to al-  
low rail-to-rail output swing. Since the buffer traditionally de-  
livers the power to the load, while maintaining high op amp  
gain and stability, and must withstand shorts to either rail,  
these tasks now fall to the integrator.  
As a result of these demands, the integrator is a compound  
affair with an embedded gain stage that is doubly fed forward  
(via Cf and Cff) by a dedicated unity-gain compensation  
driver. In addition, the output portion of the integrator is a  
push-pull configuration for delivering heavy loads. While  
sinking current the whole amplifier path consists of three  
gain stages with one stage fed forward, whereas while  
sourcing the path contains four gain stages with two fed  
forward.  
DS011236-6  
FIGURE 1. LMC6022 Circuit Topology (Each Amplifier)  
The large signal voltage gain while sourcing is comparable  
to traditional bipolar op amps for load resistance of at least 5  
kΩ. The gain while sinking is higher than most CMOS op  
amps, due to the additional gain stage; however, when driv-  
7
www.national.com  
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