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LM5025DMTC/NOPB

更新时间： 2024-11-04 21:08:43
品牌 Logo 应用领域
德州仪器 - TI 开关光电二极管
页数 文件大小 规格书
31页 708K
描述
Active Clamp Voltage Mode PWM Controller 16-TSSOP -40 to 125

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中文翻译

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LM5025DMTC/NOPB 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：TSSOP-16Reach Compliance Code：compliant
Factory Lead Time：1 week风险等级：8.6
模拟集成电路 - 其他类型：SWITCHING CONTROLLER控制模式：VOLTAGE-MODE
控制技术：PULSE WIDTH MODULATION最大输入电压：90 V
最小输入电压：13 V标称输入电压：48 V
JESD-30 代码：R-PDSO-G16JESD-609代码：e4
长度：5 mm湿度敏感等级：1
功能数量：1端子数量：16
最高工作温度：125 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP16,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH认证状态：Not Qualified
座面最大高度：1.2 mm子类别：Switching Regulator or Controllers
表面贴装：YES切换器配置：PUSH-PULL
最大切换频率：650 kHz温度等级：AUTOMOTIVE
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
宽度：4.4 mmBase Number Matches：1

LM5025DMTC/NOPB 数据手册

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Sample &  
Buy  
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Community  
Reference  
Design  
Product  
Folder  
Tools &  
Software  
Technical  
Documents  
LM5025D  
SNVSAB0 –JUNE 2015  
LM5025D Active Clamp Voltage Mode PWM Controller  
1 Features  
3 Description  
The LM5025D is a functional variant of the LM5025  
active clamp PWM controller. The functional  
differences of the LM5025D are:  
1
•
•
•
Internal Start-Up Bias Regulator  
3-A Compound Main Gate Driver  
Programmable Line Under-Voltage Lockout  
(UVLO) with Adjustable Hysteresis  
•
•
•
•
The CS1 and CS2 absolute maximum ratings  
have been increased to 7 V.  
The CS1 and CS2 current limit thresholds have  
been increased to 0.5 V.  
The internal CS2 filter discharge device has been  
disabled and no longer operates each clock cycle.  
The internal VCC and VREF regulators continue to  
operate when the line UVLO pin is below  
threshold.  
•
•
•
Voltage Mode Control with Feed-Forward  
Adjustable Dual Mode Over-Current Protection  
Programmable Overlap or Deadtime Between the  
Main and Active Clamp Outputs  
•
•
•
•
•
•
•
Volt x Second Clamp  
Programmable Soft-Start  
Leading Edge Blanking  
The LM5025D PWM controller contains all of the  
features necessary to implement power converters  
utilizing the Active Clamp and Reset technique. With  
the active clamp technique, higher efficiencies and  
greater power densities can be realized compared to  
conventional catch winding or RDC clamp and reset  
techniques. Two control outputs are provided, the  
main power switch control (OUT_A) and the active  
clamp switch control (OUT_B). The two internal  
compound gate drivers parallel both MOS and Bipolar  
devices, providing superior gate drive characteristics.  
This controller is designed for high-speed operation  
including an oscillator frequency range up to 1 MHz  
and total PWM and current sense propagation delays  
less than 100 ns. The LM5025D includes a high-  
voltage start-up regulator that operates over a wide  
input range of 13 V to 90 V. Additional features  
include: Line Under-Voltage Lockout (UVLO),  
softstart, oscillator UP and DOWN sync capability,  
precision reference and thermal shutdown.  
Single Resistor Programmable Oscillator  
Oscillator Up and Down Sync Capability  
Precision 5-V Reference  
Thermal Shutdown  
2 Applications  
•
•
•
•
Server Power Supplies  
48-V Telecom Power Supplies  
42-V Automotive Applications  
High-Efficiency DC-to-DC Power Supplies  
Device Information(1)  
PART NUMBER  
PACKAGE  
BODY SIZE (NOM)  
LM5025D  
TSSOP (16)  
6.60 mm x 5.10 mm  
(1) For all available packages, see the orderable addendum at  
the end of the data sheet.  
Typical Application Diagram  
VOUT  
3.3 V  
VIN  
35 V to 78 V  
LM5025D  
VCC  
3
1
CS1  
VIN  
7
8
9
OUT_A  
OUT_B  
16 UVLO  
Error Amp  
and  
Isolation  
2
6
RAMP  
REF  
COMP 13  
CS2  
4
14 RT  
TIME  
SYNC 15  
5
SS 12  
PGND AGND  
10 11  
Up/ Down  
SYNC  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
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