Datasheet > LE58QL022BVC

LE58QL022BVC

更新时间： 2024-11-10 19:35:43

品牌	Logo	应用领域
美国微芯 - MICROCHIP		PC 电信电信集成电路
页数	文件大小	规格书
61页	929K
描述
PCM Codec

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技术参数
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LE58QL022BVC 技术参数

生命周期：	Active	包装说明：	TQFP-44
Reach Compliance Code：	compliant	Factory Lead Time：	9 weeks
风险等级：	5.68	压伸定律：	A/MU-LAW
滤波器：	YES	JESD-30 代码：	S-PQFP-G44
长度：	10 mm	功能数量：	1
端子数量：	44	工作模式：	SYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	TQFP
封装形状：	SQUARE	封装形式：	FLATPACK, THIN PROFILE
座面最大高度：	1.2 mm	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
电信集成电路类型：	PCM CODEC	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.8 mm
端子位置：	QUAD	宽度：	10 mm
Base Number Matches：	1

LE58QL022BVC 数据手册

Le58QL022

Quad Low Voltage Subscriber Line Audio-Processing Circuit

VE580 Series

APPLICATIONS

ORDERING INFORMATION

Codec function on telephone switch line cards

Device

Package (Green)¹

Packing²

Tray

Le58QL022BVC

44-pin TQFP

FEATURES

Low-power, 3.3 V CMOS technology with 5 V tolerant

1. The green package meets RoHS Directive 2002/95/EC of the

European Council to minimize the environmental impact of

electrical equipment.

digital inputs

Software and coefficient compatible to the Am79Q02/

2. For delivery using a tape and reel packing system, add a "T" suffix

to the OPN (Ordering Part Number) when placing an order.

021/031 QSLAC device

Performs the functions of four codec/filters

Software programmable:

— SLIC input impedance

DESCRIPTION

The Le58QL022 Quad Low Voltage Subscriber Line Audio-

Processing Circuit (QLSLAC™) devices integrate the key

functions of analog line cards into high-performance, very-

programmable, four-channel codec-filter devices. The

QLSLAC devices are based on the proven design of Legerity’s

reliable SLAC™ device families. The advanced architecture of

the QLSLAC devices implements four independent channels

and employs digital filters to allow software control of

transmission, thus providing a cost-effective solution for the

audio-processing function of programmable line cards. The

QLSLAC devices are software and coefficient compatible to the

QSLAC devices.

— Transhybrid balance

— Transmit and receive gains

— Equalization (frequency response)

— Digital I/O pins

— Programmable debouncing on one input

— Time slot assigner

— Programmable clock slot and PCM transmit clock edge

options

Standard microprocessor interface

A-law, µ-law, or linear coding

Single or Dual PCM ports available

— Up to 128 channels (PCLK at 8.192 MHz) per PCM port

— Optional supervision on the PCM highway

Advanced submicron CMOS technology makes the

Le58QL022 QLSLAC devices economical, with both the

functionality and the low power consumption needed in line

card designs to maximize line card density at minimum cost.

When used with four Legerity SLIC devices, a QLSLAC device

provides a complete software-configurable solution to the

BORSCHT functions.

1.536, 1.544, 2.048, 3.072, 3.088, 4.096, 6.144, 6.176, or

8.192 MHz master clock derived from MCLK or PCLK

Built-in test modes with loopback, tone generation,

and µP access to PCM data

BLOCK DIAGRAM

Mixed state (analog and digital) impedance scaling

Performance guaranteed over a 12 dB gain range

Dual/Single

PCM

Highway

Analog

VIN₁

Real Time Data register with interrupt (open drain or

DXA

Signal Processing

Channel 1 (CH 1)

VOUT₁

DRA

TTL output)

TSCA

DXB

Time Slot Assigner

(TSA)

VIN₂

Signal Processing

Channel 2 (CH 2)

VOUT₂

Supports multiplexed SLIC device outputs

Broadcast state

DRB

VIN₃

Signal Processing

Channel 3 (CH 3)

TSCB

VOUT₃

VIN₄

Signal Processing

Channel 4 (CH 4)

VOUT₄

256 kHz or 293 kHz chopper clock for Legerity SLIC

VREF

SLIC

devices with switching regulator

Clock

Reference

Circuits

CD1₁

CD2₁

C3₁

Maximum channel bandwidth for V.90 modems

C4₁

C5₁

PCLK

MCLK/E1

RELATED LITERATURE

CD1₂

CD2₂

C3₂

080754 Le58QL061/063 QLSLAC™ Data Sheet

080147 Le79Q02/021/031 QSLAC™ Data Sheet

080193 Le79Q061/063 QSLAC™ Data Sheet

C4₂

SLIC

Interface

(SLI)

C5₂

CD1₃

CD2₃

C3₃

C4₃

C5₃

CD1₄

CD2₄

080761 QSLAC™ to QLSLAC™ Design Conversion

C3₄

C4₄

Guide

Microprocessor Interface

(MPI)

RST

C5₄

080758 QSLAC™ to QLSLAC™ Guide to New Designs

CHCLK

INT

DIO

DCLK

Microprocessor

Document ID# 080814 Date:

April 09 2009

NOTE: On August 3, 2007, Zarlink Semiconductor acquired the products and

technology of Legerity Holdings.

Version:

Distribution:

Public Document

12 3 4 5 6 7...61

中文翻译

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与LE58QL022BVC相关器件

型号	品牌	获取价格	描述	数据表
LE58QL022BVCT	MICROCHIP	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQFP44
LE58QL02FJC	MICROCHIP	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC44
LE58QL02FJCT	MICROSEMI	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC44, GREEN, PLASTIC, MS-018AC, LCC-44
LE58QL02JC	MICROSEMI	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC44, PLASTIC, MS-018AC, LCC-44
LE58QL031DJC	MICROCHIP	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC32
LE58QL031DJCT	MICROSEMI	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC32, GREEN, PLASTIC, MS-016, LCC-32
LE58QL031JC	MICROSEMI	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQCC32, PLASTIC, MS-016, LCC-32
LE58QL061BVC	MICROSEMI	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQFP44, GREEN, MS-026ACB, TQFP-44
LE58QL061BVC	MICROCHIP	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQFP44
LE58QL061BVCT	MICROCHIP	获取价格	PCM Codec, A/MU-Law, 1-Func, CMOS, PQFP44

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