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LC4102C PDF预览

LC4102C

更新时间: 2024-10-27 22:47:15
品牌 Logo 应用领域
三洋 - SANYO 显示器接口集成电路驱动
页数 文件大小 规格书
8页 63K
描述
LCD Dot Matrix Common Driver for STN Displays

LC4102C 技术参数

生命周期:Transferred零件包装代码:DIE
包装说明:DIE, DIE OR CHIP针数:221
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.36
数据输入模式:SERIAL显示模式:DOT MATRIX
接口集成电路类型:LIQUID CRYSTAL DISPLAY DRIVERJESD-30 代码:R-XUUC-N221
复用显示功能:NO底板数:160-BP
功能数量:1区段数:160
端子数量:221最高工作温度:75 °C
最低工作温度:-20 °C封装主体材料:UNSPECIFIED
封装代码:DIE封装等效代码:DIE OR CHIP
封装形状:RECTANGULAR封装形式:UNCASED CHIP
电源:3/5 V认证状态:Not Qualified
子类别:Other Interface ICs最大压摆率:0.5 mA
最大供电电压:5.5 V最小供电电压:2.7 V
电源电压1-最大:36 V电源电压1-分钟:14 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL EXTENDED端子形式:NO LEAD
端子位置:UPPER最小 fmax:2.5 MHz
Base Number Matches:1

LC4102C 数据手册

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Ordering number : EN5789A  
CMOS LSI  
LC4102C  
LCD Dot Matrix Common Driver  
for STN Displays  
Overview  
Features  
The LC4102C is a common driver for large-scale dot  
matrix LCD panels. It includes a 160-bit bidirectional shift  
register and 4-level LCD driver circuits. The number of  
bits can be further increased by using the provided input  
and output pins to connect multiple LC4102Cs in cascade.  
The LC4102C and LC4104C form a large-screen LCD  
panel driver chip set.  
• Fabricated in a CMOS (P-sub) high-voltage process.  
• LCD drive voltage: 36 V  
• Logic system power-supply voltage: 2.7 to 5.5 V  
• fcp max: 2.5 MHz  
• Slim chip (output pads are concentrated on one of the  
longer sides)  
• Bidirectional shift register  
• The shift register can be split into two 80-bit registers.  
(Two screens drivable)  
• DISPOFF function that locks the drive voltages output  
to the LCD at fixed levels.  
• Display duty: 1/160 to 1/480  
• Appropriate for COG (chip on glass) mounting. (A gold  
bump structure is adopted in the pad areas.)  
Specifications  
The electrical characteristics values shown below are for devices packaged in the Sanyo standard PGA-208 package.  
Absolute Maximum Ratings at V = 0  
SS  
Parameter  
Symbol  
Applicable pins  
min  
–0.3  
typ  
max  
7.0  
Unit  
V
V
DD max  
VEE max  
VSS max  
VIN  
VDD  
VEE  
Supply voltage  
–0.3  
–0.3  
40.0  
0.3  
V
VSSH  
V
1
*
–0.3  
VDD + 0.3  
VEE + 0.3  
VSS + 7.0  
+0.3  
V
2
V0, V1  
V4  
V0, V1 *  
VEE – 7.0  
–0.3  
V
Input voltage  
2
V4 *  
V
2
V5  
V5 *  
–0.3  
V
Operating temperature  
Storage temperature  
Topr  
–20  
+75  
°C  
°C  
Tstg  
–55  
+125  
Note: 1. LOAD, RS/LS, DISP, DF, DIO1, DIO160, DMIN and MODE  
2. The voltages V0, V1, V4, and V5 must obey the relationships VEE V0 V1 VEE – 7 V, and 7 V V4 V5 VSSH  
.
Allowable Operating Ranges at V = 0, Ta = –20 to +75°C  
SS  
Parameter  
Symbol  
VDD  
VEE  
Applicable pins  
min  
2.7  
typ  
0
max  
5.5  
36  
Unit  
V
VDD  
VEE  
Supply voltage  
14  
V
VSSH  
VIH  
VSSH  
V
1
Input high-level voltage  
Input low-level voltage  
*
0.8 × VDD  
VDD  
0.2 × VDD  
VEE  
V
1
VIL  
*
0
VEE – 7.0  
0
V
2
V0, V1  
V4  
V0, V1 *  
V
2
Input voltage  
V4 *  
V
+ 7.0  
V
SSH  
2
V5  
V5 *  
0
V
Note: 1. LOAD, RS/LS, DISP, DF, DIO1, DIO160, DMIN and MODE  
2. The voltages V0, V1, V4, and V5 must obey the relationships VEE V0 V1 VEE – 7 V, and 7 V V4 V5 VSSH  
.
When turning on the power supplies, first turn on the logic system power supply and then turn on the high-voltage system power supply; alternatively,  
turn both on at the same time.  
When turning off the power supplies, first turn off the high-voltage system power supply and then turn off the logic system power supply; alternatively,  
turn both off at the same time.  
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters  
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN  
43098HA (OT)/82097HA (OT) No. 5789-1/8  

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