®
ispMACH 4000V/B/C/Z Family
3.3V/2.5V/1.8V In-System Programmable
TM
SuperFAST High Density PLDs
Coolest Power
November 2007
Data Sheet DS1020
TM
■ Broad Device Offering
Features
• Multiple temperature range support
■ High Performance
– Commercial: 0 to 90°C junction (T )
– Industrial: -40 to 105°C junction (T )
– Extended: -40 to 130°C junction (T )
• For AEC-Q100 compliant devices, refer to
LA-ispMACH 4000V/Z Automotive Data Sheet
j
• f
= 400MHz maximum operating frequency
MAX
j
• t = 2.5ns propagation delay
PD
j
• Up to four global clock pins with programmable
clock polarity control
• Up to 80 PTs per output
■ Easy System Integration
• Superior solution for power sensitive consumer
applications
■ Ease of Design
• Enhanced macrocells with individual clock,
reset, preset and clock enable controls
• Up to four global OE controls
• Operation with 3.3V, 2.5V or 1.8V LVCMOS I/O
• Operation with 3.3V (4000V), 2.5V (4000B) or
1.8V (4000C/Z) supplies
• 5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI
interfaces
• Individual local OE control per I/O pin
• Excellent First-Time-FitTM and refit
• Fast path, SpeedLockingTM Path, and wide-PT
path
• Wide input gating (36 input logic blocks) for fast
counters, state machines and address decoders
• Hot-socketing
• Open-drain capability
• Input pull-up, pull-down or bus-keeper
• Programmable output slew rate
• 3.3V PCI compatible
• IEEE 1149.1 boundary scan testable
• 3.3V/2.5V/1.8V In-System Programmable
(ISP™) using IEEE 1532 compliant interface
• I/O pins with fast setup path
■ Zero Power (ispMACH 4000Z) and Low
Power (ispMACH 4000V/B/C)
• Typical static current 10µA (4032Z)
• Typical static current 1.3mA (4000C)
• 1.8V core low dynamic power
• ispMACH 4000Z operational down to 1.6V V
CC
• Lead-free package options
Table 1. ispMACH 4000V/B/C Family Selection Guide
ispMACH
4032V/B/C
ispMACH
4064V/B/C
ispMACH
4128V/B/C
ispMACH
4256V/B/C
ispMACH
4384V/B/C
ispMACH
4512V/B/C
Macrocells
32
64
128
256
384
512
I/O + Dedicated Inputs
30+2/32+4
30+2/32+4/
64+10
64+10/92+4/
96+4
64+10/96+14/
128+4/160+4
128+4/192+4
128+4/208+4
t
(ns)
2.5
1.8
2.5
1.8
2.7
1.8
3.0
2.0
3.5
2.0
3.5
2.0
PD
t (ns)
S
t
f
(ns)
2.2
2.2
2.7
2.7
2.7
2.7
CO
(MHz)
400
400
333
322
322
322
MAX
Supply Voltages (V)
Pins/Package
3.3/2.5/1.8V
3.3/2.5/1.8V
3.3/2.5/1.8V
3.3/2.5/1.8V
3.3/2.5/1.8V
3.3/2.5/1.8V
44 TQFP
48 TQFP
44 TQFP
48 TQFP
100 TQFP
100 TQFP
128 TQFP
144 TQFP1
100 TQFP
144 TQFP1
176 TQFP
256 ftBGA2/
fpBGA2, 3
176 TQFP
256 ftBGA/
fpBGA3
176 TQFP
256 ftBGA/
fpBGA3
1. 3.3V (4000V) only.
2. 128-I/O and 160-I/O configurations.
3. Use 256 ftBGA package for all new designs. Refer to PCN#14A-07 for 256 fpBGA package discontinuance.
© 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
www.latticesemi.com
1
DS1020_23.0
5秒后页面跳转
AO3401场效应管参数、引脚图、应用原理图
BT131可控硅参数及引脚图、工作原理详解
74LS32芯片参数、引脚图及功能真值表
全球首块英伟达H200交付 黄仁勋“送货上门”
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
