Datasheet > LC4128B-75TN100I

LC4128B-75TN100I

更新时间： 2024-11-21 04:20:51

品牌	Logo	应用领域
莱迪思 - LATTICE		可编程逻辑器件
页数	文件大小	规格书
99页	451K
描述
3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs

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LC4128B-75TN100I 数据手册

ispMACH 4000V/B/C/Z Family

3.3V/2.5V/1.8V In-System Programmable

SuperFAST High Density PLDs

Coolest Power

November 2007

Data Sheet DS1020

■ Broad Device Offering

Features

• Multiple temperature range support

■ High Performance

– Commercial: 0 to 90°C junction (T )

– Industrial: -40 to 105°C junction (T )

– Extended: -40 to 130°C junction (T )

• For AEC-Q100 compliant devices, refer to

LA-ispMACH 4000V/Z Automotive Data Sheet

• f

= 400MHz maximum operating frequency

MAX

• t = 2.5ns propagation delay

• Up to four global clock pins with programmable

clock polarity control

• Up to 80 PTs per output

■ Easy System Integration

• Superior solution for power sensitive consumer

applications

■ Ease of Design

• Enhanced macrocells with individual clock,

reset, preset and clock enable controls

• Up to four global OE controls

• Operation with 3.3V, 2.5V or 1.8V LVCMOS I/O

• Operation with 3.3V (4000V), 2.5V (4000B) or

1.8V (4000C/Z) supplies

• 5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI

interfaces

• Individual local OE control per I/O pin

• Excellent First-Time-Fit^TMand reﬁt

• Fast path, SpeedLocking^TMPath, and wide-PT

path

• Wide input gating (36 input logic blocks) for fast

counters, state machines and address decoders

• Hot-socketing

• Open-drain capability

• Input pull-up, pull-down or bus-keeper

• Programmable output slew rate

• 3.3V PCI compatible

• IEEE 1149.1 boundary scan testable

• 3.3V/2.5V/1.8V In-System Programmable

(ISP™) using IEEE 1532 compliant interface

• I/O pins with fast setup path

■ Zero Power (ispMACH 4000Z) and Low

Power (ispMACH 4000V/B/C)

• Typical static current 10µA (4032Z)

• Typical static current 1.3mA (4000C)

• 1.8V core low dynamic power

• ispMACH 4000Z operational down to 1.6V V

• Lead-free package options

Table 1. ispMACH 4000V/B/C Family Selection Guide

ispMACH

4032V/B/C

ispMACH

4064V/B/C

ispMACH

4128V/B/C

ispMACH

4256V/B/C

ispMACH

4384V/B/C

ispMACH

4512V/B/C

Macrocells

128

256

384

512

I/O + Dedicated Inputs

30+2/32+4

30+2/32+4/

64+10

64+10/92+4/

96+4

64+10/96+14/

128+4/160+4

128+4/192+4

128+4/208+4

(ns)

2.5

1.8

2.5

1.8

2.7

1.8

3.0

2.0

3.5

2.0

3.5

2.0

t (ns)

(ns)

2.2

2.7

(MHz)

400

333

322

MAX

Supply Voltages (V)

Pins/Package

3.3/2.5/1.8V

44 TQFP

48 TQFP

44 TQFP

48 TQFP

100 TQFP

128 TQFP

144 TQFP¹

100 TQFP

144 TQFP¹

176 TQFP

256 ftBGA²/

fpBGA^{2, 3}

176 TQFP

256 ftBGA/

fpBGA³

176 TQFP

256 ftBGA/

fpBGA³

1. 3.3V (4000V) only.

2. 128-I/O and 160-I/O conﬁgurations.

3. Use 256 ftBGA package for all new designs. Refer to PCN#14A-07 for 256 fpBGA package discontinuance.

or product names are trademarks or registered trademarks of their respective holders. The speciﬁcations and information herein are subject to change without notice.

www.latticesemi.com

DS1020_23.0

12 3 4 5 6 7...99

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与LC4128B-75TN100I相关器件

型号	品牌	获取价格	描述	数据表
LC4128B-75TN128C	LATTICE	获取价格	3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4128B-75TN128I	LATTICE	获取价格	3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4128C-10T100I	LATTICE	获取价格	3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4128C-10T128I	LATTICE	获取价格	3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4128C-10TN100I	LATTICE	获取价格	3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4128C-10TN128I	LATTICE	获取价格	3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4128C-27T100C	LATTICE	获取价格	3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4128C-27T128C	LATTICE	获取价格	3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
LC4128C-27T128I	LATTICE	获取价格	EE PLD, 3.5ns, 128-Cell, CMOS, PQFP128,
LC4128C-27TN100C	LATTICE	获取价格	3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs

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