®
L84225100BaseTX/FX/10BaseT
Physical Layer Device
Technical Manual
Features
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Single-chip 100BaseTX/100BaseFX/
10BaseT physical layer solution
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Meets all applicable IEEE 802.3,
10BaseT, 100BaseTX and 100BaseFX
standards
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Four independent Channels in One IC
3.3 V power supply with 5 V tolerant I/O
Dual Speed - 10/100 Mbps
On-chip wave shaping - no external
filters required
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Adaptive Equalizer for 100BaseTX
Baseline Wander Correction
LED outputs
Half and Full Duplex
MII interface or reduced pin count MII
(RMII) interface to Ethernet Controller
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–
–
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Link, Activity, Collision
Full Duplex
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MI interface for configuration and status
Optional Repeater Interface
Far End Fault (for FX)
10/100
AutoNegotiation for 10/100, Full/Half
Duplex hardware controlled
advertisement
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160L PQFP
Contents
Description - - - - - - - - - - - - - - - - - - - - - 2 Specifications - - - - - - - - - - - - - - - - - - - 87
Pin Description - - - - - - - - - - - - - - - - - - 4 Ordering Information - - - - - - - - - - - - - 114
Functional Description - - - - - - - - - - - - -13 Revision History - - - - - - - - - - - - - - - - 114
Register Description- - - - - - - - - - - - - - -57 Surface Mount Packages- - - - - - - - - - 117
Application Information- - - - - - - - - - - - -70
Note:
Check for the latest revision of this document before start-
ing any designs. This document is available on the Web, at
www.lsilogic.com
MD400183/B
April, 2002
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Copyright © 1999-2002 by LSI Logic Corporation. All rights reserved.