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L84225

更新时间: 2024-11-10 23:44:35
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页数 文件大小 规格书
118页 829K
描述
L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02

L84225 数据手册

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®
L84225100BaseTX/FX/10BaseT  
Physical Layer Device  
Technical Manual  
Features  
Single-chip 100BaseTX/100BaseFX/  
10BaseT physical layer solution  
Meets all applicable IEEE 802.3,  
10BaseT, 100BaseTX and 100BaseFX  
standards  
Four independent Channels in One IC  
3.3 V power supply with 5 V tolerant I/O  
Dual Speed - 10/100 Mbps  
On-chip wave shaping - no external  
filters required  
Adaptive Equalizer for 100BaseTX  
Baseline Wander Correction  
LED outputs  
Half and Full Duplex  
MII interface or reduced pin count MII  
(RMII) interface to Ethernet Controller  
Link, Activity, Collision  
Full Duplex  
MI interface for configuration and status  
Optional Repeater Interface  
Far End Fault (for FX)  
10/100  
AutoNegotiation for 10/100, Full/Half  
Duplex hardware controlled  
advertisement  
160L PQFP  
Contents  
Description - - - - - - - - - - - - - - - - - - - - - 2 Specifications - - - - - - - - - - - - - - - - - - - 87  
Pin Description - - - - - - - - - - - - - - - - - - 4 Ordering Information - - - - - - - - - - - - - 114  
Functional Description - - - - - - - - - - - - -13 Revision History - - - - - - - - - - - - - - - - 114  
Register Description- - - - - - - - - - - - - - -57 Surface Mount Packages- - - - - - - - - - 117  
Application Information- - - - - - - - - - - - -70  
Note:  
Check for the latest revision of this document before start-  
ing any designs. This document is available on the Web, at  
www.lsilogic.com  
MD400183/B  
April, 2002  
1 of 118  
Copyright © 1999-2002 by LSI Logic Corporation. All rights reserved.  

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