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KU82596DX PDF预览

KU82596DX

更新时间: 2024-09-16 20:00:35
品牌 Logo 应用领域
英特尔 - INTEL 通信时钟局域网数据传输外围集成电路
页数 文件大小 规格书
77页 773K
描述
LAN Controller, 1 Channel(s), 2.5MBps, CMOS, PQFP132, 0.635 MM PITCH, PLASTIC, QFP-132

KU82596DX 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:BQFP,针数:132
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.83其他特性:ON-CHIP MEMORY MANAGEMENT
地址总线宽度:30边界扫描:NO
总线兼容性:386DX; 376最大时钟频率:33 MHz
通信协议:SYNC, HDLC数据编码/解码方法:NRZ; BIPH-LEVEL(MANCHESTER)
最大数据传输速率:2.5 MBps外部数据总线宽度:32
JESD-30 代码:S-PQFP-G132长度:24.13 mm
低功率模式:NODMA 通道数量:4
I/O 线路数量:串行 I/O 数:1
端子数量:132片上数据RAM宽度:
最高工作温度:85 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:BQFP
封装形状:SQUARE封装形式:FLATPACK, BUMPER
认证状态:Not QualifiedRAM(字数):0
座面最大高度:4.32 mm最大压摆率:300 mA
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:GULL WING端子节距:0.635 mm
端子位置:QUAD宽度:24.13 mm
uPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, LANBase Number Matches:1

KU82596DX 数据手册

 浏览型号KU82596DX的Datasheet PDF文件第2页浏览型号KU82596DX的Datasheet PDF文件第3页浏览型号KU82596DX的Datasheet PDF文件第4页浏览型号KU82596DX的Datasheet PDF文件第5页浏览型号KU82596DX的Datasheet PDF文件第6页浏览型号KU82596DX的Datasheet PDF文件第7页 
82596DX AND 82596SX  
HIGH-PERFORMANCE 32-BIT LOCAL  
AREA NETWORK COPROCESSOR  
Y
Y
Y
Performs Complete CSMA/CD Medium  
High-Performance 16-/32-Bit Bus  
Master Interface  
Ð 66-MB/s Bus Bandwidth  
Ð 33-MHz Clock, Two Clocks Per  
Transfer  
Ð Bus Throttle Timers  
Ð Transfers Data at 100% of Serial  
Bandwidth  
Ð 128-Byte Receive FIFO, 64-Byte  
Transmit FIFO  
Access Control (MAC) FunctionsÐ  
Independently of CPU  
Ð IEEE 802.3 (EOC) Frame Delimiting  
Supports Industry Standard LANs  
Ð IEEE TYPE 10BASE-T (TPE),  
IEEE TYPE 10BASE5 (Ethernet*),  
IEEE TYPE 10BASE2 (Cheapernet),  
IEEE TYPE 1BASE5 (StarLAN),  
and the Proposed Standard  
TYPE 10BASE-F  
Y
Network Management and Diagnostics  
Ð Monitor Mode  
Ð 32-Bit Statistical Counters  
Ð Proprietary CSMA/CD Networks Up  
to 20 Mb/s  
Y
Y
Y
On-Chip Memory Management  
Ð Automatic Buffer Chaining  
Ð Buffer Reclamation after Receipt of  
Bad Frames; Optional Save Bad  
Frames  
Self-Test Diagnostics  
Configurable Initialization Root for Data  
Structures  
Y
Y
High-Speed, 5-V, CHMOS** IV  
Technology  
Ð 32-Bit Segmented or Linear (Flat)  
Memory Addressing Formats  
132-Pin Plastic Quad Flat Pack (PQFP)  
and PGA Package  
(See Packaging Specifications Order Number: 240800-001,  
Package Type KU and A)  
Y
Y
82586 Software Compatible  
Optimized CPU Interface  
Ð 82596DX Bus Interface Optimized to  
Intel’s 32-Bit i386TMDX  
Ð 82596SX Bus Interface Optimized to  
Intel’s 16-Bit i386TMSX  
Ð Supports Big Endian and Little  
Endian Byte Ordering  
i386TM is a trademark of Intel Corporation  
*Ethernet is a registered trademark of Xerox Corporation.  
**CHMOS is a patented process of Intel Corporation.  
290219–1  
Figure 1. 82596DX/SX Block Diagram  
*Other brands and names are the property of their respective owners.  
Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or  
copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products. Intel retains the right to make  
changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata.  
©
COPYRIGHT INTEL CORPORATION, 1996  
November 1995  
Order Number: 290219-006  

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Microcontroller, 8-Bit, MROM, 8051 CPU, 16MHz, CMOS, PQFP100, 0.635 MM PITCH, PLASTIC, QFP